參數(shù)資料
型號(hào): IR2E46Y
廠商: Sharp Corporation
英文描述: Illumination and Flash RGB-LED Driver
中文描述: 照明和閃光的RGB LED驅(qū)動(dòng)器
文件頁(yè)數(shù): 9/14頁(yè)
文件大?。?/td> 353K
代理商: IR2E46Y
IR2E46Y
Sheet No.: F1-A00301EN
I
2
C-BUS Interface timing characteristics
All specified output timings are based on 20% and 80% of VDD.
Fs-mode
Parameter
fS
CL
tHD;STA
tLOW
tHIGH
tSU;DAT
tHD;DAT
tr
tf
Cb
tSU;STO
tSP
tBUF
Symbol
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
Conditions
MIN.
0
600
1300
600
100
0
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
MAX.
400
-
-
-
-
900
300
300
400
-
50
-
VnL
VnH
-
-
pF
ns
ns
ns
V
V
SCL clock frequency
Hold time(repeated) START condition
LOW period of the SCL clock
HIGH period of the SCL clock
Data set-up time
Data hold time
SCL and SDA rise time
SCL and SDA fall time
Capacitive load represented by each bus line
Set-up time for STOP condition
Tolerable spike width on bus
Bus free time between START and STOP condition
Noise margin at the LOW level for each connected
device (including hysteresis)
Noise margin at the HIGH level for each connected
device (including hysteresis)
Note 1.
Note 1.
20+0.1Cb
-
600
-
1300
0.1VDD
0.2VDD
20+0.1Cb
-
-
Hs-mode
Parameter
fS
CLH
tSU;STA
tHD;STA
tLOW
tHIGH
tSU;DAT
tHD;DAT
trCL
trCL1
tfCL
trDA
tfCL1
tSU;STO
Cb
Cb2
tSP
Symbol
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
MIN.
0
160
160
160
60
10
20
10
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX.
3.4
-
-
-
-
-
70
40
80
40
80
80
-
100
400
5
pF
ns
V
V
SCL clock frequency
Set-up time(repeated) START condition
Hold time(repeated) START condition
LOW period of the SCL clock
HIGH period of the SCL clock
Data set-up time
Data hold time
Rise time of the SCL signal
Rise time of the SCL signal after the acknowledge bit
Fall time of the SCL signal
Rise time of the SDA signal
Fall time of the SCL signal
Set-up time for STOP condition
Capacitive load for the SDA and SCL lines
Capacitive load for the SDA and SCL lines
Tolerable spike width on bus
Noise margin at the LOW level for each
connected device (including hysteresis)
10
10
10
10
160
-
-
-
Noise margin at the HIGH level for each
connected device (including hysteresis)
VnL
VnH
0.2VDD
0.1VDD
-
-
-
-
pF
Note 1: Cb=100pF total capacitance of one bus line.
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