參數(shù)資料
型號: IR2156SPbF
廠商: International Rectifier
英文描述: BALLAST CONTROL IC
中文描述: 鎮(zhèn)流器控制IC
文件頁數(shù): 18/24頁
文件大?。?/td> 497K
代理商: IR2156SPBF
IR2156
(S) & (PbF)
18
www.irf.com
exceeds 13V, the gate-to-source voltage of
MOSFET S4 begins to fall below the turn-on
threshold of S4. As pin CPH continues to ramp
towards VCC, switch S4 turns off slowly. This
results in resistor RPH being disconnected
smoothly from resistor RT, which causes the
operating frequency to ramp smoothly from the
preheat frequency, through the ignition frequency,
to the final run frequency. The over-current
threshold on pin CS will protect the ballast against
a non-strike or open-filament lamp fault condition.
The voltage on pin CS is defined by the lower
half-bridge MOSFET current flowing through the
external current sensing resistor RCS. The resistor
RCS therefore programs the maximum allowable
peak ignition current (and therefore peak ignition
voltage) of the ballast output stage. The peak
ignition current must not exceed the maximum
allowable current ratings of the output stage
MOSFETs. Should this voltage exceed the internal
threshold of 1.3V, the IC will enter FAULT mode
and both gate driver outputs HO and LO will be
latched low.
Run Mode (RUN)
Once the lamp has successfully ignited, the
ballast enters run mode. The run mode is defined
as the state the IC is in when the lamp arc is
established and the lamp is being driven to a given
power level. The run mode oscillating frequency
is determined by the timing resistor RT and timing
capacitor CT (see Design Equations, page 19,
Equations 3 and 4). Should hard-switching occur
at the half-bridge at any time due to an open-
filament or lamp removal, the voltage across the
current sensing resistor, RCS, will exceed the
internal threshold of 1.3 volts and the IC will enter
FAULT mode. Both gate driver outputs, HO and
LO, will be latched low.
DC Bus Under-voltage Reset
Should the DC bus decrease too low during a
brown-out line condition or over-load condition, the
resonant output stage to the lamp can shift near
or below resonance. This can produce hard-
switching at the half-bridge which can damage
the half-bridge switches. To protect against this,
pin VDC measures the DC bus voltage and pulls
down on pin CPH linearly as the voltage on pin
VDC decreases 10.9V below VCC. This causes
the p-channel MOSFET S4 (Figure 4) to close as
the DC bus decreases and the frequency to shift
higher to a safe operating point above resonance.
The DC bus level at which the frequency shifting
occurs is set by the external RBUS resistor and
internal RVDC resistor. By pulling down on pin
CPH, the ignition ramp is also reset. Therefore,
should the lamp extinguish due to very low DC
bus levels, the lamp will be automatically ignited
as the DC bus increases again. The internal RVDC
resistor is connected between pin VDC and COM
when CPH exceeds 7.5V (during preheat mode).
Fault Mode (FAULT)
Should the voltage at the current sensing pin, CS,
exceed 1.3 volts at any time after the preheat
mode, the IC enters fault mode and both gate
driver outputs, HO and LO, are latched in the 'low'
state. CPH is discharged to COM for resetting
the preheat time, and CT is discharged to COM
for disabling the oscillator. To exit fault mode, VCC
must be recycled back below the UVLO negative-
going turn-off threshold, or, the shutdown pin, SD,
must be pulled above 5.1 volts. Either of these
will force the IC to enter UVLO mode (see State
Diagram, page 6). Once VCC is above the turn-
on threshold and SD is below 4.5 volts, the IC
will begin oscillating again in the preheat mode.
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