參數(shù)資料
型號(hào): IR2125S
英文描述: Single High Side Driver. Current Limiting. Programmable Shutdown Error Pin in a 16-lead SOIC package
中文描述: 單高側(cè)驅(qū)動(dòng)器。電流限制。關(guān)閉錯(cuò)誤引腳可編程的16引腳SOIC封裝
文件頁數(shù): 2/16頁
文件大?。?/td> 173K
代理商: IR2125S
IR2125
(S)
2
www.irf.com
Symbol
V
B
V
S
V
HO
V
CC
V
IN
V
ERR
V
CS
dV
s
/dt
P
D
Definition
Min.
-0.3
Max.
525
Units
High Side Floating Supply Voltage
High Side Floating Offset Voltage
V
B
- 25
V
S
- 0.3
-0.3
V
B
+ 0.3
V
B
+ 0.3
25
High Side Floating Output Voltage
Logic Supply Voltage
V
Logic Input Voltage
-0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
B
+ 0.3
50
Error Signal Voltage
-0.3
Current Sense Voltage
V
S
- 0.3
Allowable Offset Supply Voltage Transient
Package Power Dissipation @ T
A
+25
°
C (8 lead PDIP)
V/ns
1.0
(16 lead SOIC)
1.25
Rth
JA
Thermal Resistance, Junction to Ambient (8 lead PDIP)
125
(16lLead SOIC)
100
T
J
T
S
T
L
Junction Temperature
150
Storage Temperature
-55
150
Lead Temperature (Soldering, 10 seconds)
300
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
IN
V
ERR
V
CS
T
A
Definition
Min.
V
S
+ 12
Note 1
Max.
V
S
+ 18
500
Units
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
V
S
0
V
B
18
Logic Supply Voltage
Logic Input Voltage
0
V
CC
V
CC
V
B
125
Error Signal Voltage
0
Current Sense Signal Voltage
V
S
-40
Ambient Temperature
°
C
Note 1:
Logic operational for V
S
of -5 to +500V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
W
°
C/W
°
C
V
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