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IP568x
56K V.90 Modem Single Chip
PIN Description
Pin No.
1
13
18
19
21
33
35
36
37
38
40
41
42
43
44
48
Preliminary, Specification subject to change without notice
3
Tel: 886-2-26961080
IP568x-DS-P05, Nov, 2002 Fax: 886-2-26961085
Copyright@2002, IC ACE Corp. Email: sales@icace.com.tw
Symbol
/DTR
/RXD
/TXD
/CODRST
T1
/RTS
/DSR
/CTS
/MRLED
/TRLED
/DCD
/AALED
/HSLED
/RI
/OH
/FLHWR
I/O
I
I
O
O
I
I
O
O
O
O
O
O
O
I
O
O
Description
RS232 DTR signal
RS232 data input and TD LED
Data output to RS232 and RD LED
Codec Reset
Connect with pin 13
RS232 RTS signal
RS232 DSR signal
RS232 CTS signal
MR LED pin
DTR LED pin
DCD
AA LED pin
HS LED pin
Telephone interface ring input
Hook relay control (P1.2)
IP568x flash memory write enable
If program memory is not flash memory, this pin is an NC pin
IP568x program strobe enable
For external ROM or internal ROM selection
Host Address bus of IP568x
SP1 Transmit Data Output pin
SP1 Receive Data Input pin
SP1 Frame signal
Reference Clock for SP1 and SP2
Codec Clock
Host Data bus of IP568x
Output port 0 – 7
Oscillator input. It accepts either a crystal or an external TTL driver.
Oscillator output
Line loop current detection
Input port (address:bit0 of F400H)
NVRAM serial data port
NVRAM clock input
NVRAM chip select
Reset pin, 3.3V input only
Regulator control output
For PLL and oscillator
For PLL and oscillator ( 3.3V )
+2.5V power supply
Digital ground
49
50
/PSEN
O
I
O
O
I
I
I
O
I/O
O
I
O
I
EXT/INT_ROM
HA0-HA17
DT0
DR0
FS0
SCLK
CODECLK
HD0-HD7
Out[7:0]
OSCI
OSCO
/LCS
52-55, 57-62,65-72
76
77
80
78
81
83-90
92-93,100-105
95
96
106
107
108
109
115
119
94
97
EEDATA
EESK
EECS
/RESET
VOUTR
AGND
AVDD3.3
VDD2.5V
GND
I/O
O
O
I
O
P
P
P
P
12,45,63,75,91,113
8,17,25,30,39,46,56,
64,73,79,98,124