參數(shù)資料
型號(hào): INA332AIDGKR
元件分類: 測(cè)量放大器
英文描述: Precision Instrumentation Amplifier
中文描述: 精密儀表放大器
文件頁(yè)數(shù): 11/17頁(yè)
文件大?。?/td> 292K
代理商: INA332AIDGKR
INA332, INA2332
SBOS216A
11
www.ti.com
SHUTDOWN MODE
The shutdown pin of the INA332 is nominally connected to V+.
When the pin is pulled below 0.8V on a 5V supply, the INA332
goes into sleep mode within nanoseconds. For actual shut-
down threshold, see typical characteristic
Shutdown Voltage
vs Supply Voltage
. Drawing less than 2
μ
A of current, and
returning from sleep mode in microseconds, the shutdown
feature is useful for portable applications. Once in
sleep-
mode
the amplifier has high output impedance, making the
INA332 suitable for multiplexing.
RAIL-TO-RAIL OUTPUT
A class AB output stage with common-source transistors is
used to achieve rail-to-rail output for gains of 10 or greater.
For resistive loads greater than 10k
, the output voltage can
swing to within 25mV of the supply rail while maintaining low
gain error. For heavier loads and over temperature, see the
typical characteristic
Output Voltage Swing vs Output Cur-
rent.
The INA332
s low output impedance at high frequencies
makes it suitable for directly driving Capacitive-Input A/D
converters, as shown in Figure 4.
FIGURE 4. INA332 Directly Drives Capacitive-Input, High-
Speed A/D Converter.
OUTPUT BUFFERING
The INA332 is optimized for a load impedance of 10k
or
greater. For higher output current the INA332 can be buff-
ered using the OPA340, as shown in Figure 5. The OPA340
can swing within 50mV of the supply rail, driving a 600
load.
The OPA340 is available in the tiny MSOP-8 package.
OFFSET TRIMMING
The INA332 is laser trimmed for low offset voltage. In the
event that external offset adjustment is required, the offset
can be adjusted by applying a correction voltage to the
reference terminal. Figure 6 shows an optional circuit for
trimming offset voltage. The voltage applied to the REF
terminal is added to the output signal. The gain from REF to
V
OUT
is +1. An op amp buffer is used to provide low
impedance at the REF terminal to preserve good common-
mode rejection.
FIGURE 7. Sample Output Buffering Circuit.
INPUT PROTECTION
Device inputs are protected by ESD diodes that will conduct
if the input voltages exceed the power supplies by more than
500mV. Momentary voltages greater than 500mV beyond
the power supply can be tolerated if the current through the
input pins is limited to 10mA. This is easily accomplished with
input resistor R
LIM
, as shown in Figure 7. Many input signals
are inherently current-limited to less than 10mA, therefore, a
limiting resistor is not required.
FIGURE 5. Output Buffering Circuit. Able to drive loads as
low as 600
.
FIGURE 6. Optional Offset Trimming Voltage.
ADS7818
or
ADS7822
12-Bits
+5V
INA332
5
3
2
V
OUT
8
7
6
4
V
1
V+
Shutdown
RG
V
IN
V
IN
+
REF
f
S
< 100kHz
OPA340
V
OUT
+5V
0.1
μ
F
0.1
μ
F
INA332
5
3
2
V
OUT
8
7
6
4
1
V+
Shutdown
RG
V
IN
V
V
IN
+
REF
OPA336
Adjustable
Voltage
INA332
5
3
2
V
OUT
8
7
6
4
1
V+
Shutdown
RG
V
IN
V
V
IN
+
REF
(1)
NOTE: (1) REF should be adjusted for the desired output level.
The value of REF affects the common-mode input range.
R
LIM
R
LIM
I
10mA max
INA332
5
3
2
V
OUT
8
7
6
4
1
V+
Shutdown
RG
V
IN
V
V
IN
+
REF
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