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參數(shù)資料
| 型號： | IN74HC221AN |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | DUAL MONOSTABLE MULTIVIBRATOR |
| 中文描述： | 雙單穩(wěn)態(tài)觸發(fā)器 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 283K |
| 代理商： | IN74HC221AN |
IN74HC221A
1
D
UAL
M
ONOSTABLE
M
ULTIVIBRATOR
The IN74HC221A is identical in pinout to the LS/ALS221. The
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling
signals
The device may also be triggered by using the RESET input
(positive-edge) because of the Schmitt-trigger input; after
triggering the output maintains the MONOSTABLE state for the
time period determined by the external resistor R
EXT
and
capacitor C
EXT
. Taking RESET low breaks this MONOSTABLE
STATE. If the next trigger pulse occurs during the
MONOSTABLE period it makes the MONOSTABLE period
longer.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0
μ
A
High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC
D SUFFIX
SOIC
1
16
1
16
ORDERING INFORMATION
IN74HC221AN Plastic
IN74HC221AD SOIC
IZ74HC221AZ Chip
T
A
= -55
°
to 125
°
C for all
packages
PIN ASSIGNMENT
Note
(1) C
EXT
, R
EXT
, D
EXT
are external components.
(2) D
EXT
is a clamping diode.
The external capacitor is charged to V
CC
in the stand-by
state, i.e. no trigger. When the supply voltage is turned off
C
X
is discharged mainly through an internal parasitic
diode. If C
X
is sufficiently large and V
CC
decreases rapidy,
there will be some possibility of damaging the I.C. with a
surge current or latch-up. If the voltage supply filter
capacitor is large enough and V
CC
decrease slowly, the
surge current is automatically limited and damage the I.C.
is avoided. The maximum forward current of the parasitic
diode is approximately 20 mA.
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
FUNCTION TABLE
Inputs
B
RESET
H
H
Outputs
Q
Note
Output
Enable
Inhibit
Inhibit
Output
Enable
Output
Enable
Inhibit
A
Q
X
H
L
L
X
H
H
H
L
*
L
*
H
*
H
*
L
H
X
X
L
L
H
X = don’t care
*
- except for monostable period
1
2
3
5
4
6
7
8
16
15
14
13
12
11
10
9
GND
VCC
1R
/C
EXT
EXT
1C
EXT
1Q
2Q
2RESET
2B
2A
1A
1B
1RESET
1Q
2Q
2C
EXT
2R
/C
EXT
EXT
C
EXT
R
EXT
D
EXT
C
EXT
R
EXT
D
EXT
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