參數(shù)資料
型號: IMP1832SEMA
廠商: IMP INC.
英文描述: 3.3V レP Power Suppl Monitor and Reset Circuit
中文描述: 3.3レ冪p Suppl監(jiān)控和復位電路
文件頁數(shù): 1/7頁
文件大小: 109K
代理商: IMP1832SEMA
Also included is a watchdog timer to stop and restart a
microprocessor that is “hung-up”. Three watchdog time-
out periods are selectable: 150ms, 610ms and 1,200ms. If the
ST input is not strobed LOW before the time-out period
expires, a reset is issued.
Devices are available in 8-pin DIP, 8-pin SO and compact
8-pin MicroSO packages.
1999 IMP, Inc.
408-432-9100/ www.impweb.com
1
Key Features
N
Pin compatible with the Dallas Semiconductor
DS1832
— Over 40% lower supply current
N
3.3V supply monitor
N
Push-pull output
N
Selectable watchdog period
N
Debounce manual push-button reset input
N
Precision temperature-compensated voltage
reference and comparator
N
Power-up, power-down and brownout detection
N
250ms minimum reset time
N
Active LOW and HIGH reset signal
N
Selectable trip point tolerance: 10% or 20%
N
Low-cost 8-pin DIP/SO and 8-pin MicroSO
packages
N
Wide operating temperature –40
°
C to +85
°
C
Block Diagram
V
CC
RESET
PBRST
1
1832_02.eps
40k
W
TOL
IMP1832
3
V
CC
+
10%/20% Tolerance
Selection
Reference
V
CC
8
6
TD
Push Button
Debounce
2
Watchdog
Timebase Selection
GND
4
Reset &
Watchdog Timer
ST
7
Watchdog
Transition Detector
V
CC
RESET
5
IMP1
832
P
OWER
M
ANAGEMENT
3.3V
μ
μ
Monit
or and R
– Select
able T
r
r
i
i
p
p
-P
-P
W
atc
hdog P
er
er
– Push-Butt
on R
– Push-Pull R
The IMP1832 microprocessor supervisor can halt and restart a “hung-
up” or “stalled” microprocessor, restart a microprocessor after a power
failure, and debounce a manual push-button microprocessor reset
switch. The IMP1832 features over 40% lower supply current than the
pin compatible Dallas Semiconductor DS1832.
Precision temperature compensated reference and comparator circuits
monitor the 3.3V, V
CC
input voltage. During power-up or when the V
CC
power supply falls outside selectable tolerance limits, both RESET and
RESET become active. When V
CC
rises above the threshold voltage, the
reset signals remain active for an additional 250ms minimum, allowing
the power supply and system microprocessor to stabilize. The trip point
tolerance signal, TOL, selects the trip level tolerance to be either 10- or
20-percent.
RESET and RESET outputs are push-pull.
A debounced manual reset input, PBRST, activates the reset outputs for
a minimum period of 250ms.
P P
o
o
w
w
er Suppl
y
y
eset Cir
oint T
iod
eset
eset Outputs
cuit
oler
ance and
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