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參數(shù)資料
| 型號： | IEEE1394 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | RELAY SSR SPST 60V 500MA 6SMT |
| 中文描述： | 電機(jī)及電子學(xué)工程師聯(lián)合會1394/Device灣的ATSC數(shù)字電視接收機(jī) |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 440K |
| 代理商： | IEEE1394 |
PDI1394L11 1394 A/V Link layer controller
Full IEEE 1394-1995 compliant
Hardware support for IEC 61883 standard
A/V interface port supports high-speed (isochronous)
digital data streams
Asynchronous interface port supports command and
control functions
Compatible with any IEEE 1394-1995 100, 200 and
400 Mbits/s physical layer devices
Philips PDI1394L11, is an IEEE 1394-1995 link layer controller
featuring an embedded A/V layer interface. The A/V layer is
designed to pack and un-pack application data packets for
transmission over an IEEE 1394 bus using isochronous data transfers.
Application data is packetized according to IEC61883 specification
of digital interface for consumer electronic audio/video equipment.
The A/V layer interface is a byte wide port capable of
accommodating various MPEG2 and DV codecs. A byte wide host
interface is provided for internal register configuration as well as
performing asynchronous data transfers.
PDI1394P11 three-port Physical Layer Controller
IEEE 1394-1995 compliant
Three cable ports capable of 100 Mbits/s and 200 Mbits/s
data rates
Energy saving power down feature offers lower power
consumption than competing devices
Interfaces to any IEEE 1394 standard link layer controller
Integrated on the main board for output over 1394 port connections,
or on a Device Bay daughter card for output over a Device Bay signal
connector, the PDI1394P11 provides the analog physical layer
functions to connect to a three-port node in a 1394 application.
It manages bus initialization and arbitration cycles, as well as
transmission and reception of data bits. Supporting the IEEE 1394a
short arbitrated bus reset, the PDI1394P11 reduces reset times and
hence the risk of losing isochronous data.
TDA9829 IF downconverter
The TDA9829 DTV IF amplifier/converter chip provides the signal
stages for IF processing to the DVB standard, down-converting the
digital Quadrature Amplitude Modulation (QAM) signal to a
frequency matching the symbol rate. It features VCO for QAM
carrier recovery, internal and external AGC for DVB, and is
applicable for VSB (HDTV) IF and OFDM downconversion.
The board supports standard 6 MHz VHF/
UHF digital terrestrial TV channels in the
38.9 MHz to 45.75 MHz frequency range.
IF gain is controlled using three AC-coupled,
differential amplifier stages, with a feedback
stage controlled by emitter-degeneration.
87C654 microcontroller
Together with an FPGA, the microcontroller
performs basic data, address and control signal
handling, as well power-up and reset functions.
A derivative of the 80C51 microcontroller
family, with the same instruction set, it has a
non-volatile 16 k x 8 EPROM and a volatile
256 x 8 read/write data memory, four 8-bit
I/O ports, two 16-bit timer/event counters,
nested multiple interrupts, an I
2
C-bus interface
and on-board UART.
The IEC61883 standard
Today, transmission of digital video and audio
data is commonplace, demanding standards to
ensure compatibility of equipment and
interfaces. IEC61883 specifies a digital
interface for consumer electronic audio/video
equipment. As a major contributor to the
IEC61883 protocol Philips has in-depth
expertise in the implementation of IEC61883
over IEEE 1394.
The IEC61883 standard describes the general
packet format, data flow and connection
management for audio/visual data. General
transmission rules for control commands are
also specified, as are the transmission protocol
and control commands for digital audio and
video equipment connecting via the IEEE
1394 interface. Data packetization and
transmission timing for MPEG2 transport
streams transmitted over the IEEE 1394
interface and specifications for the IEEE 1394
packet itself are also covered by IEC61883.
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