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    參數(shù)資料
    型號(hào): IDT82V2088DR
    廠商: IDT, Integrated Device Technology Inc
    文件頁(yè)數(shù): 42/78頁(yè)
    文件大?。?/td> 0K
    描述: IC LIU T1/J1/E1 8CH 208-TQFP
    標(biāo)準(zhǔn)包裝: 12
    類型: 線路接口裝置(LIU)
    規(guī)程: E1
    電源電壓: 3.13 V ~ 3.47 V
    安裝類型: 表面貼裝
    封裝/外殼: 208-BFQFP
    供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
    包裝: 托盤
    其它名稱: 82V2088DR
    47
    INDUSTRIAL
    TEMPERATURE RANGES
    OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
    Table-44 MAINT4: Maintenance Function Control Register 4
    (R/W, Address = 0EH,2EH,4EH,6EH,8EH,AEH,CEH,EEH)
    Symbol
    Bit
    Default
    Description
    RIBLBA[7:0]
    7-0
    (000)00001 Defines the user-programmable receive Inband Loopback activate code. The default selection is 00001.
    RIBLBA[7:0] form the 8-bit repeating code
    RIBLBA[6:0] form the 7-bit repeating code
    RIBLBA[5:0] form the 6-bit repeating code
    RIBLBA[4:0] form the 5-bit repeating code
    Table-45 MAINT5: Maintenance Function Control Register 5
    (R/W, Address = 0FH,2FH,4FH,6FH,8FH,AFH,CFH,EFH)
    Symbol
    Bit
    Default
    Description
    RIBLBD[7:0]
    7-0
    (00)001001 Defines the user-programmable receive Inband Loopback deactivate code. The default selection is 001001.
    RIBLBD[7:0] form the 8-bit repeating code
    RIBLBD[6:0] form the 7-bit repeating code
    RIBLBD[5:0] form the 6-bit repeating code
    RIBLBD[4:0] form the 5-bit repeating code
    Table-46 MAINT6: Maintenance Function Control Register 6
    (R/W, Address = 10H,30H,50H,70H,90H,B0H,D0H,F0H)
    Symbol
    Bit
    Default
    Description
    -
    7
    0
    Reserved.
    BPV_INS
    6
    0
    BPV error insertion
    A ‘0’ to ‘1’ transition on this bit will cause a single bipolar violation error to be inserted into the transmit data
    stream. This bit must be cleared and set again for a subsequent error to be inserted.
    ERR_INS
    5
    0
    PRBS/QRSS logic error insertion
    A ‘0’ to ‘1’ transition on this bit will cause a single PRBS/QRSS logic error to be inserted into the transmit PRBS/
    QRSS data stream. This bit must be cleared and set again for subsequent error to be inserted.
    EXZ_DEF
    4
    0
    EXZ definition select
    = 0: ANSI
    = 1: FCC
    ERR_SEL
    3-2
    00
    These bits choose which type of error will be counted
    = 00: the PRBS logic error is counted by a 16-bit error counter.
    = 01: the EXZ error is counted by a 16-bit error counter.
    = 10: the Received CV (BPV) error is counted by a 16-bit error counter.
    = 11: both CV (BPV) and EXZ errors are counted by a 16-bit error counter.
    CNT_MD
    1
    0
    Counter operation mode select
    = 0: Manual Report Mode
    = 1: Auto Report Mode
    CNT_TRF
    0
    = 0: Clear this bit for the next ‘0’ to ‘1’ transition on this bit.
    = 1: Error counting result is transferred to CNT0 and CNT1 and the error counter is reset.
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