參數(shù)資料
型號(hào)： IDT82V2044EPFG8
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 17/73頁(yè)
文件大?。?/td> 0K
描述： IC LINE INTERFC UNIT 4CH 128TQFP
標(biāo)準(zhǔn)包裝： 1
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-TQFP（14x20）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 800-1863-6
24
INDUSTRIAL
TEMPERATURE RANGES
QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
3.5.2
AIS DETECTION
TheAlarmIndicationSignalcanbedetectedbytheIDT82V2044Ewhen
the Clock&Data Recovery unit is enabled. The status of AIS detection is
reflected in the AIS_S bit (STAT0, 14H...). In T1/J1 applications, the criteria
for declaring/clearing AIS detection are in compliance with the ANSI
T1.231. In E1 applications, the criteria for declaring/clearing AIS detection
comply with the ITU G.775 or the ETSI 300233, as selected by the LAC bit
(MAINT0, 0AH...). Table-15 summarizes different criteria for AIS detection
Declaring/Clearing.
Table-14 LOS Declare and Clear Criteria, Adaptive Equalizer Enabled
Control bit
LOS declare threshold
LOS clear threshold
Note
T1E1
LAC
LOS[4:0]
Q (dB)
1=T1/J1
0
T1.231
00000
00001
…
01010
01011 - 11111
-4
-6
…
-24
Reserved
Level < Q
N=175 bits
Level > Q+ 4dB
M=128 bits
12.5% mark density
<100 consecutive zeroes
1
-
00000
…
00110
-4
-16
Level < Q
N=1544 bits
Level > Q+ 4dB
M=128 bits
12.5% mark density
<100 consecutive zeroes
I.431 Level detect range is -18 to -30 dB.
I.431
00111
01010
01011 - 11111
-18
-24
Reserved
0=E1
0
-
00000
…
00010
-4
…
-8
Level < Q
N=32 bits
Level > Q+ 4dB
M=32 bits
12.5% mark density
<16 consecutive zeroes
G.775 Level detect range is -9 to -35 dB.
G.775
00011
…
01010
01011 - 11111
-10
…
-24
Reserved
1
-
00000
-4
Level < Q
N=2048 bits
Level > Q+ 4dB
M=32 bits
12.5% mark density
<16 consecutive zeroes
I.431 Level detect range is -6 to -20 dB.
I.431/
ETSI
00001
…
01010
01011 - 11111
-6
…
-24
Reserved
Table-15 AIS Condition
ITU G.775 for E1
(LAC bit is set to ‘0’ by default)
ETSI 300233 for E1
(LAC bit is set to ‘1’)
ANSI T1.231 for T1/J1
AIS
detected
Less than 3 zeros contained in each of two consecutive
512-bit streams are received
Less than 3 zeros contained in a 512-bit
stream are received
Less than 9 zeros contained in an 8192-bit stream
(a ones density of 99.9% over a period of 5.3ms)
AIS
cleared
3 or more zeros contained in each of two consecutive
512-bit streams are received
3 or more zeros contained in a 512-bit
stream are received
9 or more zeros contained in an 8192-bit stream
are received
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