參數(shù)資料
型號: IDT82P2816BB
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 128/146頁
文件大?。?/td> 0K
描述: IC LIU T1/J1/E1 16+1CH 416-PBGA
標(biāo)準(zhǔn)包裝: 5
功能: 線路接口單元(LIU)
接口: E1,J1,T1
電路數(shù): 1
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 416-BGA
供應(yīng)商設(shè)備封裝: 416-PBGA(27x27)
包裝: 托盤
包括: 缺陷和警報檢測,驅(qū)動器過流檢測和保護,LLOS 檢測,PRBSARB / IB 檢測和生成
其它名稱: 82P2816BB
IDT82P2816
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Programming Information
82
February 6, 2009
TJA - Transmit Jitter Attenuation Configuration Register
Address: 002H, 042H, 082H, 0C2H, 102H, 142H, 182H, 1C2H, (CH1~CH8)
202H, 242H, 282H, 2C2H, 302H, 342H, 382H, 3C2H, (CH9~CH16)
7C2H (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7 - 5
-
Reserved.
4
TJA_LIMT
This bit determines whether the JA-Limit function is enabled in the TJA.
0: Disable. (default)
1: Enable. The speed of the TJA outgoing data will be adjusted automatically if the FIFO in the TJA is 2-bit close to its full or emp-
tiness.
3
TJA_EN
This bit controls whether the TJA is enabled to use.
0: Disable. (default)
1: Enable.
2 - 1
TJA_DP[1:0]
These bits select the depth of the TJA FIFO.
00: 128-bit. (default)
01: 64-bit.
1X: 32-bit.
0
TJA_BW
This bit selects the Corner Frequency for the TJA.
0: 5 Hz (in T1/J1 mode) / 6.77 Hz (in E1 mode). (default)
1: 1.26 Hz (in T1/J1 mode) / 0.87 Hz (in E1 mode).
7
654321
0
-
TJA_LIMT
TJA_EN
TJA_DP1
TJA_DP0
TJA_BW
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