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June 24, 2002
2002IntegratedDeviceTechnology,Inc.
DSC 4308/4
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Data Path Interface (DPI) to
Utopia Level 1
Translation Device
Features
!
SinglechipATMLayerUTOPIALevel1to4-bitDPIinterface.
!
Supports ATMForumUTOPIA Level1interface.
!
Supports ATMdeviceinterfaceinCellmode.
!
Capableoffull-duplexoperationup-to160Mbps.
!
Utilitybus interfacetoaccess PHY registers.
!
In-streamcontroltoaccess PHY registers.
Desc ription
The77010interfaces aUTOPIAPHY devicetoadevicethatuses a
Data Path Interface (DPI). Examples of PHY devices may include the
IDT77105, and the IDT77V400 Switching Memory is an example of a
component that utilizes a DPI interface. Figure 1 illustrates a typical
applicationusingtheIDT77010.
The UTOPIA level 1 bus interface runs at speeds upto155 Mbps,
withtheDPI-4interfacecapableoffullduplexoperationat160Mbps.
In-streamprogrammng is usedtoreadandwrite tothe PHY regis-
ters, with the Control Cells being generated froma remote controlling
agent. The Control Cells are used to configure, control and retrieve
statusofthePHY device.
T heory of Operation
UTOPIA receive cells aretransferredtotheDPI-4interfaceonecell
atatime.TheDPI-4clockrateistwicethefrequencyofreceiveUTOPIA
clock.
DPI-4transmtcells aretransferredtotheUTOPIA transmtbus one
cellatatime.Transmtflowcontrolisusedtomatchthetransmtcellrate
tothePHY'stransmtcellrate.
Control cells are insertedanddecodedby the control cell decoder.
The control cells are filteredandwill notbe transferredtothe UTOPIA
transmtbus.
Thecontrolcelldecoderblockidentifies thecontrolcells andsignals
theUtilityBusInterfacetoexecutethecommands.ForaUtilitybuswrite
command cell, the Utility bus does a one byte write to the specified
Utility bus address. Fora Utility bus readcommandcell, the Utility bus
readsonebytefromthespecifiedUtilitybusaddressandloadsthisbyte
receivecellarbitertoprocess thecell, andgenerates a status cellifno
UTOPIAreceivecellisdetected.
A status cell is a complete ATMcell generated and loaded to the
ReceiveDPI-4I/F logic.
AreceivecellontheDPI-4busiseitheranATMcellfromthereceive
UTOPIAbusorastatusATMcelllocallygenerated.Internallygenerated
ATMcellsareoutputtotheReceiveDPI-4Interfaceonlywhenthereare
noUTOPIAReceivecell.Figure2belowshowsthedevicedataflow
Block Diagram
Figure1 TypicalIDT77010Application
OC-3
or
STS-3
OC-3
PHY
IDT77010
UTOPIA L1
to DPI I/F
Utility bus
Switching
Memory
IDT77V400
4308 drw 01
"
"
"
"
"
"
UTOPIA L1
Receive
UTOPIA L1
Transmit
DPI Receive
4
DPI Transmit
4
.
IDT77010