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參數(shù)資料
| 型號： | IDT74LVC273ASO |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 鎖存器 |
| 英文描述： | LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 66K |
| 代理商： | IDT74LVC273ASO |
INDUSTRIALTEMPERATURERANGE
IDT74LVC273A
3.3VCMOSOCTALD-TYPEFLIP-FLOPWITHRESET
1
AUGUST 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4595/3
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
Rail-to-rail output swing for increased noise margin
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SOIC, SSOP, QSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC273A
DESCRIPTION:
The octal D-type flip-flop with reset, positive edge trigger is built using
advanced dual metal CMOS technology. This high-speed, low power
device is ideal for driving high capacitance loads such as memory address
and data buses.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of these devices as translators in a mixed 3.3V/5V supply system.
3.3V CMOS OCTAL D-TYPE
FLIP-FLOP WITH RESET,
POSITIVE EDGE TRIGGER,
AND 5 VOLT TOLERANT I/O
D
CP
Dx
CLR
CP
Q
CLR
Ox
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| IDT74LVC4245APYG | 功能描述:IC BUS TRANSCVR 3-ST 8BIT 24SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:74LVC 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應商設備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
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