參數(shù)資料
型號(hào): IDT74LVC16827APA
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): 總線(xiàn)收發(fā)器
英文描述: LVC/LCX/Z SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56
封裝: TSSOP-56
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 71K
代理商: IDT74LVC16827APA
INDUSTRIALTEMPERATURERANGE
IDT74LVC16827A
3.3V CMOS 20-BIT BUFFER WITH 5V TOLERANT I/O
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4489/4
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC16827A
DESCRIPTION:
This 20-bit buffer is built using advanced dual metal CMOS technology.
The LVC16827A provides high-performance bus interface buffering for
wide data/address paths or buses carrying parity. Two pairs of NAND-ed
output enable controls offer maximum control flexibility and are organized
to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The LVC16827A buffer is ideally suited for driving high capacitance loads
and low impedance backplanes.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of the device as a translator in a mixed 3.3V/5V supply system.
The LVC16827A has been designed with a ±24mA output driver. The
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
3.3V CMOS
20-BIT BUFFER
WITH 5 VOLT TOLERANT I/O
1
A1
1
OE1
1
Y1
1
OE2
TO NINE OTHER CHANNELS
2
A1
2
OE1
2
Y1
2
OE2
1
56
55
2
28
29
42
15
TO NINE OTHER CHANNELS
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