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參數(shù)資料
| 型號(hào)： | IDT74FCT16823ETPF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 總線(xiàn)收發(fā)器 |
| 英文描述： | FCT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | TVSOP-56 |
| 文件頁(yè)數(shù)： | 2/8頁(yè) |
| 文件大?。?/td> | 132K |
| 代理商： | IDT74FCT16823ETPF8 |
2
MILITARYANDINDUSTRIALTEMPERATURERANGES
IDT54/74FCT16823AT/BT/CT/ET
FAST CMOS 18-BIT REGISTER
SSOP/ TSSOP/ TVSOP/ CERPACK
TOP VIEW
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
Unit
VTERM(2)
Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
5v16-link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
3.5
6
pF
COUT
Output Capacitance
VOUT = 0V
3.5
8
pF
5v16-link
NOTE:
1. This parameter is measured at characterization but not tested.
SO56-1
SO56-2
SO56-3
E56-1
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
2
CLR
GND
VCC
2
Q3
2
Q5
2
Q6
2
Q4
GND
2
Q7
2
Q8
2
Q9
2
OE
GND
1
Q9
1
Q5
1
Q6
1
Q7
1
Q8
2
Q1
2
Q2
GND
1
Q2
VCC
1
CLR
1
Q1
1
Q3
1
Q4
1
OE
1
CLK
1
D1
GND
1
D2
1
D3
VCC
1
D4
1
D5
1
D6
1
D7
1
D8
1
D9
GND
2
D1
1
CLKEN
2
D2
GND
2
D4
2
D5
2
D6
GND
2
D7
2
D8
2
D9
2
CLK
2
D3
2
CLKEN
PIN DESCRIPTION
Pin Names
Description
xDx
Data inputs
xCLK
Clock Inputs
x
CLKEN
Clock Enable Inputs (Active LOW)
x
CLR
Asynchronous clear Inputs (Active LOW)
x
OE
Output Enable Inputs (Active LOW)
xQx
3-State Outputs
FUNCTION TABLE(1)
Inputs
Outputs
xOE
xCLR
xCLKEN
xCLK
xDx
xQx
Function
H
X
Z
High Z
L
X
L
Clear
LH
H
X
Q(2)
Hold
HH
L
↑
L
Z
Load
HH
L
↑
HZ
LH
L
↑
LL
LH
L
↑
HH
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
2. Output level before indicated steady-state input conditions were
established.
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