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參數(shù)資料
| 型號(hào)： | IDT74AUCH16245PFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | AUC SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | TVSOP-48 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 189K |
| 代理商： | IDT74AUCH16245PFI |
INDUSTRIALTEMPERATURERANGE
IDT74AUCH16245
1.8V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
1
OCTOBER 2002
IDT74AUCH16245
INDUSTRIAL TEMPERATURE RANGE
1.8V CMOS 16-BIT BUS
TRANSCEIVER WITH
3-STATE OUTPUTS AND
BUS-HOLD
DESCRIPTION:
This 16-bit bus transceiver is built using advanced CMOS technology. The
AUCH16245 is designed specifically for asynchronous communications be-
tweendatabuses. Thecontrolfunctionimplementationminimizesexternaltiming
requirements.
This device can be used as one 16-bit transceiver or two 8-bit transceivers.
ItallowsdatatransmissionfromAbustoBbusorfromBbustoAbus,depending
on the logic level at the direction-control (DIR) input. The output-enable (
OE)
inputcanbeusedtodisablethedevicesothatthebusesareeffectivelyisolated.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the outputs, preventing damaging current backflow
through the device when it is powered down.
The AUCH16245 is designed with a ±9mA output driver. This driver is
capable of driving a moderate load while maintaining speed performance.
To ensure the high-impedance state during power up or power down,
OE
shouldbetiedtoVDDthroughapull-upresistor;theminimumvalueoftheresistor
is determined by the current-sinking capability of the driver.
The AUCH16245 data I/Os have bus-hold, which retains the last value
whenever the I/O goes to a high impedance. This prevents floating inputs and
eliminates the need for pull-up/pull-down resistors. Control inputs do not have
bus-hold and should not be allowed to float.
1
A1
1
B1
47
2
1
DIR
1
OE
2
A1
2
B1
36
13
2
DIR
2
OE
1
48
24
25
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2002 Integrated Device Technology, Inc.
DSC-5966/12
FEATURES:
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
1.8V Optimized
0.8V to 2.7V Operating Range
Inputs/outputs tolerant up to 3.6V
Output drivers: ±9mA @ VDD = 2.3V
Supports hot insertion
Available in TSSOP, TVSOP, and VFBGA packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
High performance, low voltage communications systems
High performance, low voltage computing systems
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