參數(shù)資料
型號(hào): IDT72V51453L7-5BB8
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 35/50頁(yè)
文件大?。?/td> 0K
描述: IC FLOW CTRL MULTI QUEUE 256-BGA
標(biāo)準(zhǔn)包裝: 1,000
類型: 多隊(duì)列流量控制
安裝類型: 表面貼裝
封裝/外殼: 256-BBGA
供應(yīng)商設(shè)備封裝: 256-BGA(17x17)
包裝: 帶卷 (TR)
其它名稱: 72V51453L7-5BB8
40
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V51433/72V51443/72V51453 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
Figure 22.
PAEn - Direct Mode - Sector Selection
RCLK
tSTH
tSTS
tQH
tQS
001xxxx1
5939 drw24
RDADD
ESTR
Device 1
Sector 2
tQS
tQH
001xxxx0
Device 1
Sector 1
tQS
tQH
001xxxx1
Device 1
Sector 2
tSTS
tSTH
PAEn
tPAE
Device 1 Sector 2
Device 1 Sector 1
tPAE
Device 1 Sector 2
Figure 23.
PAFn - Direct Mode - Sector Selection
WCLK
tSTH
tSTS
tQH
tQS
001xxx0
5939 drw25
WRADD
FSTR
Device 1
Sector 1
tQS
tQH
001xxx1
Device 1
Sector 2
tQS
tQH
001xxx0
Device 1
Sector 1
tSTS
tSTH
PAFn
tPAF
Device 1 Sector 1
Device 1 Sector 3
tPAF
Device 1 Sector 1
NOTES:
1. Sectors can be selected on consecutive cycles.
2. On an RCLK cycle that the ESTR is HIGH, the RADEN input must be LOW.
3. There is a latency of 1 RCLK for the
PAEn bus to switch.
NOTES:
1. Sectors can be selected on consecutive cycles.
2. On a WCLK cycle that the FSTR is HIGH, the WADEN input must be LOW.
3. There is a latency of 1 WCLK for the
PAFn bus to switch.
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IDT72V51453L7-5BBI 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA(27x27) 包裝:散裝
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