參數(shù)資料
型號(hào)： IDT72V51433L6BB8
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 15/50頁
文件大小： 0K
描述： IC FLOW CTRL MULTI QUEUE 256-BGA
標(biāo)準(zhǔn)包裝： 1,000
類型： 多隊(duì)列流量控制
安裝類型： 表面貼裝
封裝/外殼： 256-BBGA
供應(yīng)商設(shè)備封裝： 256-BGA（17x17）
包裝： 帶卷 (TR)
其它名稱： 72V51433L6BB8
22
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V51433/72V51443/72V51453 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
TABLE 4 — FLAG OPERATION BOUNDARIES & TIMING
Output Valid,
OV Flag Boundary
I/O Set-Up
OV Boundary Condition
In18 to out18 or In9 to out9
OV Goes LOW after 1st Write
(Both ports selected for same queue
(see note below for timing)
when the 1st Word is written in)
In18 to out9)
OV Goes LOW after 1st Write
(Both ports selected for same queue
(see note below for timing)
when the 1st Word is written in)
In9 to out18
OV Goes LOW after 2nd Write
(Both ports selected for same queue
(see note below for timing)
when the 1st Word is written in)
NOTE:
1.
OV Timing
Assertion:
Write to
OV LOW: tSKEW1 + RCLK + tROV
If tSKEW1 is violated there may be 1 added clock: tSKEW1 + 2 RCLK + tROV
De-assertion:
Read Operation to
OV HIGH: tROV
NOTE:
D = Queue Depth
FF Timing
Assertion:
Write Operation to
FF LOW: tWFF
De-assertion:
Read to
FF HIGH: tSKEW1 + tWFF
If tSKEW1 is violated there may be 1 added clock: tSKEW1+WCLK +tWFF
Full Flag,
FF Boundary
I/O Set-Up
FF Boundary Condition
In18 to out18 or In9 to out9
FF Goes LOW after D+1 Writes
(Both ports selected for same queue
(see note below for timing)
when the 1st Word is written in)
In18 to out18 or In9 to out9
FF Goes LOW after D Writes
(Write port only selected for queue
(see note below for timing)
when the 1st Word is written in)
In18 to out9
FF Goes LOW after D Writes
(Both ports selected for same queue
(see note below for timing)
when the 1st Word is written in)
In18 to out9
FF Goes LOW after D Writes
(Write port only selected for queue
(see note below for timing)
when the 1st Word is written in)
In9 to out18
FF Goes LOW after ([D+1] x 2) Writes
(Both ports selected for same queue
(see note below for timing)
when the 1st Word is written in)
In9 to out18
FF Goes LOW after (D x 2) Writes
(Write port only selected for queue
(see note below for timing)
when the 1st Word is written in)
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IDT72V51433L7-5BB8 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
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IDT72V51436L6BB 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
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