IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC II
參數(shù)資料
型號: IDT72V263L10PFI8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 8/45頁
文件大?。?/td> 0K
描述: IC FIFO 8192X18 10NS 80QFP
標準包裝: 750
系列: 72V
功能: 異步,同步
存儲容量: 144K(8K x 18)
數(shù)據(jù)速率: 100MHz
訪問時間: 10ns
電源電壓: 3.15 V ~ 3.45 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應商設備封裝: 80-TQFP(14x14)
包裝: 帶卷 (TR)
其它名稱: 72V263L10PFI8
16
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO
512 x 18, 1K x 9/18, 2K x 9/18, 4K x 9/18, 8K x 9/18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9
FEBRUARY 11, 2009
Figure 3. Programmable Flag Offset Programming Sequence (Continued)
WCLK
RCLK
X
XX
X
XX
LD
0
X
1
0
WEN
0
1
0
X
1
REN
1
0
1
X
0
1
1X
SEN
1
X
0
No Operation
Write Memory
Read Memory
No Operation
Parallel write to registers:
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
Serial shift into registers:
Ending with Full Offset (MSB)
IDT72V223, IDT72V233
IDT72V243, IDT72V253
IDT72V263, IDT72V273
IDT72V283, IDT72V293
Parallel read from registers:
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
20 bits for the IDT72V223
22 bits for the IDT72V233
24 bits for the IDT72V243
26 bits for the IDT72V253
28 bits for the IDT72V263
30 bits for the IDT72V273
32 bits for the IDT72V283
34 bits for the IDT72V293
1 bit for each rising WCLK edge
Starting with Empty Offset (LSB)
Serial shift into registers:
Ending with Full Offset (MSB)
18 bits for the IDT72V223
20 bits for the IDT72V233
22 bits for the IDT72V243
24 bits for the IDT72V253
26 bits for the IDT72V263
28 bits for the IDT72V273
30 bits for the IDT72V283
32 bits for the IDT72V293
1 bit for each rising WCLK edge
Starting with Empty Offset (LSB)
x9 to x9 Mode
All Other Modes
4666 drw06a
NOTES:
1. The programming method can only be selected at Master Reset.
2. Parallel reading of the offset registers is always permitted regardless of which programming method has been selected.
3. The programming sequence applies to both IDT Standard and FWFT modes.
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