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| 型號(hào)： | IDT72V251L15JI8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FIFO SYNC 4096X18 15NS 32PLCC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | 72V |
| 功能： | 同步 |
| 存儲(chǔ)容量： | 72K（4K x 18） |
| 數(shù)據(jù)速率： | 67MHz |
| 訪問(wèn)時(shí)間： | 15ns |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 32-PLCC（13.97x11.43） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 72V251L15JI8 |
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3.3 VOLT CMOS SyncFIFO
256 x 9, 512 x 9,
1,024 x 9, 2,048 x 9,
4,096 x 9 and 8,192 x 9
IDT72V201, IDT72V211
IDT72V221, IDT72V231
IDT72V241, IDT72V251
2013 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-4092/6
AUGUST 2013
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
are very high-speed, low-power First-In, First-Out (FIFO) memories with
clockedreadandwritecontrols.Thearchitecture,functionaloperationandpin
assignments are identical to those of the IDT72201/72211/72221/72231/
72241/72251,butoperateatapowersupplyvoltage(Vcc)between3.0Vand
3.6V. These devices have a 256, 512, 1,024, 2,048, 4,096 and 8,192 x 9-
bitmemoryarray,respectively.TheseFIFOsareapplicableforawidevariety
ofdatabufferingneedssuchasgraphics,localareanetworksandinterprocessor
communication.
These FIFOs have 9-bit input and output ports. The input port is
controlled by a free-running clock (WCLK), and two Write Enable pins
(WEN1, WEN2). Data is written into the Synchronous FIFO on every
rising clock edge when the Write Enable pins are asserted. The output
port is controlled by another clock pin (RCLK) and two Read Enable pins
(REN1, REN2). The Read Clock can be tied to the Write Clock for single
clock operation or the two clocks can run asynchronous of one another
for dual-clock operation. An Output Enable pin (OE) is provided on the
read port for three-state control of the output.
TheSynchronousFIFOshavetwofixedflags,Empty(EF)andFull(FF).
Twoprogrammableflags,Almost-Empty(PAE)andAlmost-Full(PAF),are
provided for improved system control. The programmable flags default to
Empty+7andFull-7forPAEandPAF,respectively.Theprogrammableflag
offsetloadingiscontrolledbyasimplestatemachineandisinitiatedbyasserting
the Load pin (LD).
These FIFOs are fabricated using high-speed submicron CMOS
technology.
FEATURES:
256 x 9-bit organization IDT72V201
512 x 9-bit organization IDT72V211
1,024 x 9-bit organization IDT72V221
2,048 x 9-bit organization IDT72V231
4,096 x 9-bit organization IDT72V241
8,192 x 9-bit organization IDT72V251
10 ns read/write cycle time
5V input tolerant
Read and Write clocks can be independent
Dual-Ported zero fall-through time architecture
Empty and Full Flags signal FIFO status
Programmable Almost-Empty and Almost-Full flags can be set to
any depth
Programmable Almost-Empty and Almost-Full flags default to
Empty+7, and Full-7, respectively
Output Enable puts output data bus in high-impedance state
Advanced submicron CMOS technology
Available in 32-pin plastic leaded chip carrier (PLCC) and 32-pin
plastic Thin Quad FlatPack (TQFP)
Industrial temperature range (–40
°°°°°C to +85°°°°°C) is available
Green parts available, see ordering information
DESCRIPTION:
TheIDT72V201/72V211/72V221/72V231/72V241/72V251SyncFIFOs
FUNCTIONAL BLOCK DIAGRAM
WCLK
WEN1
WEN2
D0 - D8
LD
OFFSET REGISTER
INPUT REGISTER
RAM ARRAY
256 x 9, 512 x 9,
1,024 x 9, 2,048 x 9,
4,096 x 9, 8,192 x 9
WRITE CONTROL
LOGIC
WRITE POINTER
RESET LOGIC
OUTPUT REGISTER
OE
RS
Q0 - Q8
RCLK
REN1
REN2
READ CONTROL
LOGIC
READ POINTER
FLAG
LOGIC
EF
PAE
PAF
FF
4092 drw 01
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| IDT72V251L15PF | 功能描述:IC FIFO SYNC 4096X18 15NS 32QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT72V251L15PF8 | 功能描述:IC FIFO SYNC 4096X18 15NS 32QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72V251L15PFGI | 功能描述:IC FIFO SYNC 4096X18 15NS 32QFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
| IDT72V251L15PFGI8 | 功能描述:IC FIFO SYNC 4096X18 15NS 32QFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲(chǔ)容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT72V251L15PFI | 功能描述:IC FIFO SYNC 4096X18 15NS 32QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF |
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