IDT72T1845/55/65/75/85/95/105/115/125 2.5V TeraSync 18-BIT/9-BIT FIFO
參數(shù)資料
型號(hào): IDT72T18105L4-4BBG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 42/55頁(yè)
文件大?。?/td> 0K
描述: IC FIFO 131072X18 SYNC 240BGA
標(biāo)準(zhǔn)包裝: 1
系列: 72T
功能: 異步,同步
存儲(chǔ)容量: 2.3K(131 x 18)
數(shù)據(jù)速率: 10MHz
訪問時(shí)間: 3.4ns
電源電壓: 2.375 V ~ 2.625 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 240-BGA
供應(yīng)商設(shè)備封裝: 240-PBGA(19x19)
包裝: 托盤
47
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72T1845/55/65/75/85/95/105/115/125 2.5V TeraSync 18-BIT/9-BIT FIFO 2Kx18/4Kx9, 4Kx18/
8Kx9, 8Kx18/16Kx9, 16Kx18/32Kx9, 32Kx18/64Kx9, 64Kx18/128Kx9, 128Kx18/256Kx9, 256Kx18/512Kx9, 512Kx18/1Mx9
FEBRUARY 10, 2009
NOTES:
1. In IDT Standard mode: D = maximum FIFO depth. If x18 Input or x18 Output bus Width is selected, D = 2,048 for the IDT72T1845, 4,096 for the IDT72T1855, 8,192 for the IDT72T1865,
16,384 for the IDT72T1875, 32,768 for the IDT72T1885, 65,536 for the IDT72T1895, 131,072 for the IDT72T18105, 262,144 for the IDT72T18115 and 524,288 for the IDT72T18125.
If both x9 Input and x9 Output bus Widths are selected, D = 4,096 for the IDT72T1845, 8,192 for the IDT72T1855, 16,384 for the IDT72T1865, 32,768 for the IDT72T1875, 65,536
for the IDT72T1885, 131,072 for the IDT72T1895, 262,144 for the IDT72T18105, 524,288 for the IDT72T18115 and 1,048,576 for the IDT72T18125.
2. In FWFT mode: D = maximum FIFO depth. If x18 Input or x18 Output bus Width is selected, D = 2,049 for the IDT72T1845, 4,097 for the IDT72T1855, 8,193 for the IDT72T1865,
16,385 for the IDT72T1875, 32,769 for the IDT72T1885, 65,537 for the IDT72T1895, 131,073 for the IDT72T18105, 262,145 for the IDT72T18115 and 524,289 for the IDT72T18125.
If both x9 Input and x9 Output bus Widths are selected, D = 4,097 for the IDT72T1845, 8,193 for the IDT72T1855, 16,385 for the IDT72T1865, 32,769 for the IDT72T1875, 65,537
for the IDT72T1885, 131,073 for the IDT72T1895, 262,145 for the IDT72T18105, 524,289 for the IDT72T18115 and 1,048,577 for the IDT72T18125.
3.
RCS = LOW.
Figure 27. Half-Full Flag Timing (IDT Standard and FWFT Modes)
WCLK
tENS
tENH
WEN
HF
tENS
tHF
RCLK
tHF
REN
5909 drw31
tCLKL
tCLKH
D/2 words in FIFO(1),
[
+ 1
] words in FIFO(2)
D-1
2
D/2 + 1 words in FIFO(1),
[
+ 2
] words in FIFO(2)
D/2 words in FIFO(1),
[
+ 1
] words in FIFO(2)
D-1
2
D-1
2
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