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參數(shù)資料
| 型號： | IDT728985J |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL SW 256X256 44-PLCC |
| 標準包裝： | 27 |
| 系列： | 7200 |
| 類型： | 多路復(fù)用器 |
| 電路： | 1 x 8:8 |
| 獨立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 其它名稱： | 728985J |
7
Commercial Temperature Range
IDT728985 Time Slot Interchange
Digital Switch 256 x 256
TABLE 4 CONNECTION MEMORY HIGH
TABLE 5 CONNECTION MEMORY LOW
TABLE 3 CONTROL REGISTER
Bit
Name
Description
7
SM (Split Memory)
When 1, all subsequent reads are from the Data Memory and writes are to the Connection Memory, except when
the Control Register is accessed again. The Memory Select bits need to specify the memory for the operations.
6
PE (Processor Mode)
When 1, the contents of the Connection Memory LOW are output on the Serial Output streams except when in high-
impedance. When 0, the Connection Memory bits for each channel determine what is output.
5
unused
4-3
MS1-MS0
0-0 - Not to be used.
(Memory Select Bits)
0-1 - Data Memory (read only from the CPU)
1-0 - Connection Memory LOW
1-1 - Connection Memory is HIGH
2-0
STA2-0
The number expressed in binary notation on these bits refers to the input or output stream which corresponds to the
(Stream Address Bits)
subsection of memory made accessible for subsequent operations.
SM
PE
X
MS1
MS0
STA2
STA1
STA0
76543210
x = don't care
Bit
Name
Description
7,5,4,3
unused
6
V/C (Variable/Constant
This bit is used to select between Variable (LOW) and Constant Delay (HIGH) modes on a per-channel basis.
Throughput Delay Mode)
2
CS
When 1, the contents of the corresponding location in Connection Memory LOW are output on the location's channel
(Channel Source)
and stream. When 0, the contents of the corresponding location in Connection Memory LOW act as an address for the
Data Memory and determine the source of the connection to the location's channel and stream.
1
CCO (CCO Bit)
This bit drives a bit time on the CCO output pin.
0
OE (Output Enable)
This bit enables the output drivers on a per-channel basis. This allows individual channels on individual streams to
be made high-impedance, allowing switch matrices to be constructed. A HIGH enables the driver and a LOW disables it.
X
V/C
XXX
CS
CCO
OE
76543210
Bit
Name
Description
7-5
SAB2-0(1)
These three bits are used to select eight source streams for the Connection.
(Source Stream Address Bits)
4-0(1)
CAB2-0(1)
These five bits are used to select 32 different source channels for the Connection (the stream where the channel
(Source Channel Address Bits)
is present is defined by bits SAB2-0). Bit 4 is the most significant bit.
SAB2
SAB1
SAB0
CAB4
CAB3
CAB2
CAB1
CAB0
NOTE:
1. If bit 2 of the corresponding Connection HIGH location is 1 or bit 6 of the Control Register is 1, then these entire 8 bits are output on the channel and stream associated with
this location. Otherwise, the bits are used as indicated to define the source of the Connection which is output on the channel and stream associated with this location.
76543210
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