
23
COMMERCIALTEMPERATURERANGE
IDT723656/723666/723676 CMOS TRIPLE BUS SyncFIFOTM WITH
BUS MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
DATA SIZE TABLE FOR WORD READS FROM FIFO1
SIZE MODE(1)
DATA WRITTEN TO FIFO1
READ
DATA READ FROM FIFO1
NO.
Figure 13. Port B Word Read Cycle Timing for FIFO1 (IDT Standard and FWFT Modes)
Figure 12. Port C Byte Write Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
NOTE:
1. BE is selected at Master Reset; SIZEB and SIZEC must be static throughout device operation.
SIZE MODE(1)
WRITE
DATA WRITTEN
DATA READ FROM FIFO2
NO.
TO FIFO2
SIZEC
BE
C8-C0
A35-A27
A26-A18
A17-A9
A8-A0
HH
A
B
C
D
HL
A
B
C
D
1A
2B
3C
4D
1D
2C
3B
4A
DATA SIZE TABLE FOR BYTE WRITES TO FIFO2
NOTE:
1. BE is selected at Master Reset; SIZEB and SIZEC must be static throughout device operation.
FFC/IRC
CLKC
tENH
tENS2
WENC
5611 drw 13
HIGH
C0-C8
tENS2
tENH
tENS2
tENH
tDS
tDH
tENH
MBC
CLKB
RENB
EFB/ORB
CSB
HIGH
5611 drw 14
B0-B17
Previous Data
tDIS
tA
tENS2
tENH
No Operation
Read 1
B0-B17
tA
Read 1
Read 2
Read 3
tDIS
MBB
(Standard Mode)
(FWFT Mode)
OR
tEN
tMDV
tEN
SIZEB
BE
A35-A27
A26-A18
A17-A9
A8-A0
B17-B9
B8-B0
HH
A
B
C
D
1
A
B
2
C
D
HL
A
B
C
D
1
C
D
2A
B