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參數(shù)資料
| 型號(hào)： | IDT7208L35J8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 14/14頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FIFO 64KX9 35NS 32PLCC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 系列： | 7200 |
| 功能： | 異步 |
| 存儲(chǔ)容量： | 576K（64K x 9） |
| 數(shù)據(jù)速率： | 22.22MHz |
| 訪問(wèn)時(shí)間： | 35ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 32-PLCC（13.97x11.43） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 7208L35J8 |
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9
COMMERCIAL,INDUSTRIALANDMILITARY
TEMPERATURERANGES
IDT7203/7204/7205/7206/7207/7208 CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 and 65,536 x 9
Figure 9. Half-Full Flag Timing
Figure 10. Expansion Out
Figure 11. Expansion In
OPERATING MODES:
Care must be taken to assure that the appropriate flag is monitored by
eachsystem(i.e.FFismonitoredonthedevicewhereWisused;EFismonitored
onthedevicewhereRisused).ForadditionalinformationontheIDT7203/7204/
7205/7206/7207, refer to Tech Note 8: Operating FIFOs on Full and Empty
Boundary Conditions and Tech Note 6: Designing with FIFOs.
Single Device Mode
A single IDT7203/7204/7205/7206/7207/7208 may be used when the
applicationrequirementsarefor2,048/4,096/8,192/16,384/32,768/65,536words
or less. These FIFOs are in a Single Device Configuration when the Expansion
In (XI) control input is grounded (see Figure 12).
Depth Expansion
These FIFOs can easily be adapted to applications when the require-
mentsareforgreaterthan2,048/4,096/8,192/16,384/32,768/65,536words.
Figure 14 demonstrates Depth Expansion using three IDT7203/7204/7205/
7206/7207/7208s. AnydepthcanbeattainedbyaddingadditionalIDT7203/
7204/7205/7206/7207/7208s. ThesedevicesoperateintheDepthExpansion
modewhenthefollowingconditionsaremet:
1. ThefirstdevicemustbedesignatedbygroundingtheFirstLoad(FL)control
input.
2. All other devices must have FLin the HIGH state.
3. TheExpansionOut(XO)pinofeachdevicemustbetiedtotheExpansion
In (XI) pin of the next device. See Figure 14.
4. ExternallogicisneededtogenerateacompositeFullFlag(FF)andEmpty
Flag (EF). This requires the ORing of all EFs and ORing of all FFs (i.e. all
must be set to generate the correct composite FFor EF). See Figure 14.
5. The Retransmit (RT) function and Half-Full Flag (HF) are not available in
the Depth Expansion Mode.
For additional information on the IDT7203/7204/7205/7206/7207, refer to
Tech Note 9: Cascading FIFOs or FIFO Modules.
W
R
HF
HALF-FULL OR LESS
MORE THAN HALF-FULL
HALF-FULL OR LESS
tRHF
tWHF
2661 drw11
W
R
XO
WRITE TO
LAST PHYSICAL
LOCATION
tXOL
tXOH
READ FROM
LAST PHYSICAL
LOCATION
2661 drw12
tXOH
tXOL
W
R
XI
WRITE TO
FIRST PHYSICAL
LOCATION
READ FROM
FIRST PHYSICAL
LOCATION
tXI
tXIR
2661 drw13
tXIS
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| IDT7208L35P | 功能描述:IC FIFO 64KX9 35NS 28DIP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲(chǔ)容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問(wèn)時(shí)間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| IDT72103L120D | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 2K x 9, Asynchronous, 40 Pin, Ceramic, DIP |
| IDT72103S50P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72104S120P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72104S50D | 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:4K X 9 OTHER FIFO, 50 ns, CDIP40 |
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