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    參數(shù)資料
    型號(hào): IDT7202LA15J8
    廠商: IDT, Integrated Device Technology Inc
    文件頁(yè)數(shù): 14/14頁(yè)
    文件大小: 0K
    描述: IC FIFO ASYNCH 1KX9 15NS 32PLCC
    標(biāo)準(zhǔn)包裝: 750
    系列: 7200
    功能: 異步
    存儲(chǔ)容量: 9K(1K x 9)
    數(shù)據(jù)速率: 40MHz
    訪問(wèn)時(shí)間: 15ns
    電源電壓: 4.5 V ~ 5.5 V
    工作溫度: 0°C ~ 70°C
    安裝類型: 表面貼裝
    封裝/外殼: 32-LCC(J 形引線)
    供應(yīng)商設(shè)備封裝: 32-PLCC(13.97x11.43)
    包裝: 帶卷 (TR)
    其它名稱: 7202LA15J8
    9
    COMMERCIAL,INDUSTRIALANDMILITARY
    TEMPERATURERANGES
    IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
    256 x 9, 512 x 9 and 1,024 x 9
    Figure 9. Half-Full Flag Timing
    Figure 10. Expansion Out
    Figure 11. Expansion In
    OPERATING MODES:
    Care must be taken to assure that the appropriate flag is monitored by
    eachsystem(i.e.FFismonitoredonthedevicewhereWisused;EFismonitored
    onthedevicewhereR isused).Foradditionalinformation,refertoTechNote
    8: Operating FIFOs on Full and Empty Boundary Conditions and Tech Note
    6: Designing with FIFOs.
    SINGLE DEVICE MODE
    A single IDT7200/7201A/7202A may be used when the application
    requirements are for 256/512/1,024 words or less. These devices are in a
    Single Device Configuration when the Expansion In (XI) control input is
    grounded (see Figure 12).
    DEPTH EXPANSION
    The IDT7200/7201A/7202A can easily be adapted to applications when
    the requirements are for greater than 256/512/1,024 words. Figure 14
    demonstrates Depth Expansion using three IDT7200/7201A/7202As. Any
    depthcanbeattainedbyaddingadditionalIDT7200/7201A/7202As. These
    FIFOs operate in the Depth Expansion mode when the following conditions
    are met:
    1. ThefirstdevicemustbedesignatedbygroundingtheFirstLoad(FL)control
    input.
    2. All other devices must have FL in the HIGH state.
    3. TheExpansionOut(XO)pinofeachdevicemustbetiedtotheExpansion
    In (XI) pin of the next device. See Figure 14.
    4. ExternallogicisneededtogenerateacompositeFullFlag(FF)andEmpty
    Flag (EF). This requires the ORing of all EFs and ORing of all FFs (i.e.
    all must be set to generate the correct composite FF or EF). See Figure
    14.
    5. TheRetransmit(RT)functionandHalf-FullFlag(HF)arenotavailablein
    the Depth Expansion Mode.
    For additional information, refer to Tech Note 9: Cascading FIFOs or
    FIFO Modules.
    R
    W
    HF
    tRHF
    HALF-FULL OR LESS
    MORE THAN HALF-FULL
    tWHF
    2679 drw 11
    HALF-FULL OR LESS
    R
    W
    XO
    2679 drw 12
    WRITE TO
    LAST PHYSICAL
    LOCATION
    tXOL
    tXOH
    READ FROM
    LAST PHYSICAL
    LOCATION
    tXOL
    tXOH
    W
    R
    XI
    WRITE TO
    FIRST PHYSICAL
    LOCATION
    tXIS
    READ FROM
    FIRST PHYSICAL
    LOCATION
    tXIS
    tXI
    tXIR
    2679 drw 13
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