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| 型號(hào)： | IDT70125S55J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| 中文描述： | 2K X 9 DUAL-PORT SRAM, 55 ns, PQCC52 |
| 封裝： | 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大小： | 168K |
| 代理商： | IDT70125S55J |
6.10
5
IDT 70121/70125S/L
HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT
COMMERCIAL TEMPERATURE RANGE
TIMING WAVEFORM OF READ CYCLE NO. 1, EITHER SIDE
(1,2,4)
ADDRESS
DATA
OUT
t
RC
t
OH
PREVIOUS DATA VALID
t
AA
t
OH
DATA VALID
2654 drw 05
t
BDD
(3,4)
BUSY
OUT
NOTES:
1. Timing depends on which signal is aserted last,
OE
or
CE
.
2. Timing depends on which signal is deaserted first,
OE
or
CE
.
3. t
BDD
delay is required only in a case where the opposite port is completing
a write operation to the same address location. For simultanious read operations
BUSY
has no relationship to valid output data.
4. Start of valid data depends on which timing becomes effective last, t
AOE
,
t
ACE
,
t
AA
, or
t
BDD
.
5. R/
W
= V
IH,
and the address is valid prior to other coincidental with
CE
transition Low.
6. R/
W
= V
IH,
CE
= V
IL, and
OE
= V
IL.
Address is valid prior to or coincident with
CE
transition Low.
CE
t
ACE
t
AOE
t
HZ
t
LZ
t
PD
VALID DATA
t
PU
50%
OE
DATA
OUT
CURRENT
I
CC
I
SS
50%
2654 drw 06
(4)
t
LZ
t
HZ
(1)
(1)
(4)
(2)
(2)
TIMING WAVEFORM OF READ CYCLE NO. 2, EITHER SIDE
(5,6)
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| IDT70121L25J | HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT70125S55J8 | 功能描述:IC SRAM 18KBIT 55NS 52PLCC RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:MoBL® 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:45ns 接口:并聯(lián) 電源電壓:2.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFBGA 供應(yīng)商設(shè)備封裝:48-VFBGA（6x8） 包裝:帶卷 (TR) |
| IDT70125S55JG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S55JGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S55L52 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
| IDT70125S55L52B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
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