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參數(shù)資料
| 型號(hào)： | IDT70121S55J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| 中文描述： | 2K X 9 DUAL-PORT SRAM, 55 ns, PQCC52 |
| 封裝： | 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大小： | 168K |
| 代理商： | IDT70121S55J |
6.10
10
IDT 70121/70125S/L
HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT
COMMERCIAL TEMPERATURE RANGE
t
INS
ADDR
'A'
INT
'B'
INTERRUPT SET ADDRESS
t
WC
t
AS
R/
W
'A'
t
WR
2654 drw 14
(2)
(3)
(3)
(4)
NOTES:
.
1. All timing is the same for left and right ports. Port 'A' may be either left or right port. Port 'B' is the opposite from port 'A'.
2. See Interupt Truth Table.
3. Timing depends on which enable signal (
CE
or R/
W
) is asserted last.
4. Timing depends on which enable signal (
CE
or R/
W
) is de-asserted first.
TIMING WAVEFORM OF INTERRUPT MODE
TRUTH TABLES
TRUTH TABLE I –
NON-CONTENTION READ/WRITE CONTROL
(4)
TRUTH TABLE II – INTERRUPT FLAG
(1,4)
Left Port
OE
L
Right Port
R
X
L
L
X
R/
W
L
L
X
X
X
CE
L
L
X
X
L
A
0L
– A
10L
7FF
X
X
7FE
INT
L
X
X
L
(3)
H
(2)
R/
W
R
X
X
L
X
CE
OE
R
X
L
X
X
A
0L
– A
10R
X
7FF
7FE
X
INT
R
L
(2)
H
(3)
X
X
Function
X
X
X
L
Set Right
INT
R
Flag
Reset Right
INT
R
Flag
Set Left
INT
L
Flag
Reset Left
INT
L
Flag
NOTES
:
1. Assumes
BUSY
L
=
BUSY
R
= V
IH
2. If
BUSY
L
= V
IL
, then No Change.
3. If
BUSY
R
= V
IL
, then No Change.
4. 'H' = V
IH
,' L' = V
IL
,' X' = DON’T CARE.
2654 tbl 13
Left or Right Port
(1)
R/
W
CE
X
H
OE
X
D
0–8
Z
Function
Port Disabled and in Power-
Down Mode, I
SB2
or I
SB4
CE
R
=
CE
L
= H, Power-Down
Mode, I
SB1
or I
SB3
Data on Port Written Into Memory
(2)
DATA
OUT
Data in Memory Output on Port
(3)
Z
High-impedance Outputs
X
H
X
Z
L
H
H
L
L
L
X
L
H
DATA
IN
NOTES:
1. A
0L
– A
10L
≠
A
0R
– A
10R
.
2. If
BUSY
= V
IL
, data is not written.
3. If
BUSY
= V
IL
, data may not be valid, see t
WDD
and t
DDD
timing.
4. 'H' = V
IH
, 'L' = V
IL
, 'X' = DON’T CARE, 'Z' = High-impedance.
2654 tbl 12
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| IDT70121S55J8 | 功能描述:IC SRAM 18KBIT 55NS 52PLCC RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:MoBL® 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:45ns 接口:并聯(lián) 電源電壓:2.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFBGA 供應(yīng)商設(shè)備封裝:48-VFBGA（6x8） 包裝:帶卷 (TR) |
| IDT70121S55JG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70121S55JGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70121S55L52 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
| IDT70121S55L52B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
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