參數(shù)資料
型號(hào)： IDT7007S35PFB
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： DRAM
英文描述： HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
中文描述： 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-80
文件頁(yè)數(shù)： 14/21頁(yè)
文件大?。?/td> 257K
代理商： IDT7007S35PFB
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
14
Timing Waveform of Write with Port-to-Port Read and
BUSY
(2,5)
(M/
S
= V
IH
)
(4)
Timing Waveform of Write with
BUSY
(M/
S
= V
IL
)
NOTES:
1. t
WH
must be met for both
BUSY
input (SLAVE) and output (MASTER).
2.
BUSY
is asserted on port "B" blocking R/
W
"B"
, until
BUSY
"B"
goes HIGH.
2940 drw 13
t
DW
t
APS
ADDR
"A"
t
WC
DATA
OUT "B"
MATCH
t
WP
R/
W
"A"
DATA
IN "A"
ADDR
"B"
t
DH
VALID
(1)
MATCH
BUSY
"B"
t
BDA
VALID
t
BDD
t
DDD
(3)
t
WDD
NOTES:
1. To ensure that the earlier of the two ports wins. t
APS
is ignored for M/
S
= V
IL
(SLAVE).
2.
CE
L
=
CE
R
= V
IL
3.
OE
= V
IL
for the reading port.
4. If M/
S
= V
IL
(SLAVE), then
BUSY
is an input (
BUSY
"A"
= V
IH
and
BUSY
"B"
= "don't care", for this example).
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
2940 drw 14
R/
W
"A"
BUSY
"B"
t
WP
t
WB
R/
W
"B"
t
WH
(1)
(2)
,
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參數(shù)描述
IDT7007S35PFI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM
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