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參數(shù)資料
| 型號： | IDT7006L35PFB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 16K X 8 DUAL-PORT SRAM, 35 ns, PQFP64 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64 |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 263K |
| 代理商： | IDT7006L35PFB |
IDT7006S/L
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.07
7
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1 and 2
2739 tbl 12
IDT7006X35
IDT7006X55
IDT7006X70
Mil. Only
Min.
Symbol
READ CYCLE
t
RC
t
AA
t
ACE
t
AOE
t
OH
t
LZ
Parameter
Min.
Max.
Min.
Max.
Max.
Unit
Read Cycle Time
Address Access Time
Chip Enable Access Time
(3)
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
(1, 2)
Output High-Z Time
(1, 2)
Chip Enable to Power Up Time
(2)
Chip Disable to Power Down Time
(2)
35
—
—
—
3
3
—
35
35
20
—
—
55
—
—
—
3
3
—
55
55
30
—
—
70
—
—
—
3
3
—
70
70
35
—
—
ns
ns
ns
ns
ns
ns
t
HZ
—
15
—
25
—
30
ns
t
PU
t
PD
0
—
—
35
0
—
—
50
0
—
—
50
ns
ns
t
SOP
Semaphore Flag Update Pulse (
OE
or
SEM
)
15
—
15
—
15
—
ns
t
SAA
Semaphore Address Access Time
—
35
—
55
—
70
ns
NOTES:
1. Transition is measured
±
500mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM,
CE
= V
IL
and
SEM
= V
IH.
To access semaphore,
CE
= V
IH and
SEM
= V
IL
.
4. "X" in part numbers indicates power rating (S or L).
2739 tbl 13
1250
30pF
775
DATA
OUT
BUSY
INT
5V
5V
1250
5pF
775
DATA
OUT
2739 drw 06
Figure 2. Output Load
(5pF for t
LZ
, t
HZ
, t
WZ
, t
OW
)
Including scope and jig.
Figure 1. AC Output Test Load
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(4)
IDT7006X15
Com'l. Only
Min. Max.
IDT7006X17
Com'l. Only
Min.
IDT7006X20
IDT7006X25
Symbol
READ CYCLE
t
RC
t
AA
Parameter
Max.
Min.
Max.
Min.
Max.
Unit
Read Cycle Time
Address Access Time
Chip Enable Access Time
(3)
15 —
— 15
17
—
—
17
20
—
—
20
25
—
—
25
ns
ns
t
ACE
— 15
—
17
—
20
—
25
ns
t
AOE
t
OH
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
(1, 2)
Output High-Z Time
(1, 2)
Chip Enable to Power Up Time
(2)
Chip Disable to Power Down Time
(2)
— 10
3
—
3
10
—
—
3
12
—
—
3
13
—
ns
ns
t
LZ
3 —
3
—
3
—
3
—
ns
t
HZ
t
PU
10
—
0
10
—
—
0
12
—
—
0
15
—
ns
ns
0
t
PD
15
—
17
—
20
—
25
ns
t
SOP
t
SAA
Semaphore Flag Update Pulse (
OE
or
SEM
) 10
Semaphore Address Access Time
10
—
—
17
10
—
—
20
10
—
—
25
ns
ns
15
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7006L55FB | Adjustable, 1.6MHz Boost Regulator with 30V Integrated FET Switch; Package: SOT-23; No of Pins: 5; Container: Tape & Reel |
| IDT7006L55G | HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
| IDT7006L55GB | HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
| IDT7006L55J | HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
| IDT7006L55PF | HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7006L35XL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7006L35XLB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7006L45F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7006L45FB | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 128KBIT 45NS 68FLATPAK |
| IDT7006L45G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
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