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參數(shù)資料
| 型號(hào)： | IDT6178S25YB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM |
| 中文描述： | 的CMOS StaticRAM 16K的（4K的× 4位）高速緩存標(biāo)記內(nèi)存 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大?。?/td> | 72K |
| 代理商： | IDT6178S25YB |
11.1
5
IDT6178S
CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
±
10%, All Temperature Ranges)
6178S10
(1)
6178S12
6178S15
6178S20/25
Symbol
Read Cycle
t
RC
t
AA
t
OE
t
OH
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Read Cycle Time
Address Access Time
Output Enable Access Time
Output Hold from Address Change
10
—
—
3
—
10
7
—
12
—
—
3
—
12
8
—
15
—
—
3
—
15
10
—
20/25
—
—
3
—
ns
ns
ns
ns
20/25
15
—
t
OLZ
(2)
Output Enable to Output in Low-Z Time
2
—
2
—
2
—
2
—
ns
t
OHZ
(2)
Output Disable to Output in High-Z Time
—
6
—
7
—
9
—
12
ns
NOTES:
1. 0
°
C to +70
°
C temperature range only.
2. This parameter guaranteed with AC load (Figure 3) by device characterization, but is not production tested.
2953 tbl 11
TIMING WAVEFORM OF READ CYCLE NO. 2
(1,2)
TIMING WAVEFORM OF READ CYCLE NO. 1
(1)
NOTES:
1.
WE
is HIGH for Read Cycle.
2. Output enable is continuously active,
OE
is LOW.
3. Transition is measured
±
200V from steady state.
OE
ADDRESS
2953 drw 08
t
RC
t
OH
t
AA
DATA
OUT
t
OE
t
OLZ
t
OHZ
DATA
OUT
VALID
(3)
(3)
ADDRESS
2953 drw 09
t
RC
t
OH
t
AA
DATA
OUT
t
OH
PREVIOUS DATA
OUT
VALID
DATA
OUT
VALID
DATA
OUT
VALID
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