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參數(shù)資料
| 型號： | IDT5V991A-2JRC |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 122K |
| 代理商： | IDT5V991A-2JRC |
5
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT5V991A
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
NOTES:
1. All timing and jitter tolerances apply for FNOM > 25MHz.
2. Skew is the time between the earliest and the latest output transition among all outputs for which the same tU delay has been selected when all are
loaded with the specified load.
3. tSKEWPR is the skew between a pair of outputs (xQ0 and xQ1) when all eight outputs are selected for 0tU.
4. tSKEW0 is the skew between outputs when they are selected for 0tU.
5. For IDT5V991A-2 tSKEW0 is measured with CL = 0pF; for CL = 30pF, tSKEW0 = 0.35ns Max.
6. There are 3 classes of outputs: Nominal (multiple of tU delay), Inverted (4Q0 and 4Q1 only with 4F0 = 4F1 = HIGH), and Divided (3Qx and 4Qx only
in Divide-by-2 or Divide-by-4 mode).
7. tDEV is the output-to-output skew between any two devices operating under the same conditions (VCC, ambient temperature, air flow, etc.)
8. tLOCK is the time that is required before synchronization is achieved. This specification is valid only after VCC is stable and within normal operating
limits. This parameter is measured from the application of a new signal or frequency at REF or FB until tPD is within specified limits.
9. tPD is measured with REF input rise and fall times (from 0.8V to 2V) of 1ns.
10. Measured at 2V.
11. Measured at 0.8V.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT5V991A-2
IDT5V991A-5
IDT5V991A-7
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
FNOM
VCO Frequency Range
See PLL Programmable Skew Range and Resolution Table
tRPWH
REF Pulse Width HIGH (11)
3—
—
3
—
3
—
ns
tRPWL
REF Pulse Width LOW (11)
3—
—
3
—
3
—
ns
tU
Programmable Skew Time Unit
See Control Summary Table
tSKEWPR
Zero Output Matched-Pair Skew (xQ0, xQ1) (1,2,3)
—
0.05
0.2
—
0.1
0.25
—
0.1
0.25
ns
tSKEW0
Zero Output Skew (All Outputs) (1,4,5)
—
0.1
0.25
—
0.25
0.5
—
0.3
0.75
ns
tSKEW1
Output Skew
(Rise-Rise, Fall-Fall, Same Class Outputs) (1,6)
—
0.25
0.5
—
0.6
0.7
—
0.6
1
ns
tSKEW2
Output Skew
(Rise-Fall, Nominal-Inverted, Divided-Divided) (1,6)
—
0.3
1.2
—
0.5
1.2
—
1
1.5
ns
tSKEW3
Output Skew
(Rise-Rise, Fall-Fall, Different Class Outputs) (1,6)
—
0.25
0.5
—
0.5
0.7
—
0.7
1.2
ns
tSKEW4
Output Skew
(Rise-Fall, Nominal-Divided, Divided-Inverted) (1,2)
—
0.5
0.9
—
0.5
1
—
1.2
1.7
ns
tDEV
Device-to-Device Skew (1,2,7)
—
0.75
—
1.25
—
1.65
ns
tPD
REF Input to FB Propagation Delay (1,9)
0.25
00.25
0.5
00.5
0.7
00.7
ns
tODCV
Output Duty Cycle Variation from 50% (1)
1.2
01.2
1.2
01.2
1.2
01.2
ns
tPWH
Output HIGH Time Deviation from 50% (1,10)
——
2
—
2.5
—
3
ns
tPWL
Output LOW Time Deviation from 50% (1,11)
—
2.5
—
3
—
3.5
ns
tORISE
Output Rise Time (1)
0.15
1
1.8
0.15
1
1.8
0.15
1.5
2.5
ns
tOFALL
Output Fall Time (1)
0.15
1
1.8
0.15
1
1.8
0.15
1.5
2.5
ns
tLOCK
PLL Lock Time (1,8)
—
0.5
—
0.5
—
0.5
ms
tJR
Cycle-to-Cycle Output Jitter (1)
RMS
—
25
—
40
—
40
ps
Peak-to-Peak
—
200
—
200
—
200
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相關代理商/技術參數(shù) |
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| IDT5V991A-5JGI | 功能描述:IC CLK DVR PLL 3.3V PROGR 32PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
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| IDT5V991A-7JI | 制造商:Integrated Device Technology Inc 功能描述:EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER, 32 Pin, Plastic, PLCC |
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