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參數(shù)資料
型號(hào): IDT5T905PGI
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 17/19頁(yè)
文件大?。?/td> 0K
描述: IC CLK BUFF 1:5 250MHZ 28-TSSOP
標(biāo)準(zhǔn)包裝: 50
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:5
差分 - 輸入:輸出: 是/無(wú)
輸入: eHSTL,HSTL,LVPECL,LVTTL
輸出: eHSTL,HSTL,LVTTL
頻率 - 最大: 250MHz
電源電壓: 2.4 V ~ 2.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
其它名稱: 5T905PGI
INDUSTRIALTEMPERATURERANGE
IDT5T905
2.5VSINGLEDATARATE1:5CLOCKBUFFERTERABUFFER
7
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. Typical values are at VDD = 2.5V, +25°C ambient.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation while in differential mode, A/VREF is tied to the DC voltage VREF.
5. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should
be referenced.
6. For differential mode (RxS = LOW), A and A/VREF must be at the opposite rail.
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR eHSTL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
1V
VX
DifferentialInputSignalCrossingPoint(2)
900
mV
VTHI
InputTimingMeasurementReferenceLevel(3)
CrossingPoint
V
tR, tF
InputSignalEdgeRate(4)
1
V/ns
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the
VDIF (AC) specification under actual use conditions.
2. A 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR
LVEPECL(1)
Symbol
Parameter
Test Conditions
Min.
Typ.(2)
Max
Unit
InputCharacteristics
IIH
Input HIGH Current(6)
VDD = 2.6V
VI = VDDQ/GND
±5
μA
IIL
InputLOWCurrent(6)
VDD = 2.6V
VI = GND/VDDQ
——
±5
VIK
ClampDiodeVoltage
VDD = 2.4V, IIN = -18mA
- 0.7
- 1.2
V
VIN
DCInputVoltage
- 0.3
3.6
V
VCM
DC Common Mode Input Voltage(3,5)
915
1082
1248
mV
VREF
Single-EndedReferenceVoltage(4,5)
1082
mV
VIH
DC Input HIGH
1275
1620
mV
VIL
DC Input LOW
555
875
mV
POWER SUPPLY CHARACTERISTICS FOR eHSTL OUTPUTS(1)
Symbol
Parameter
Test Conditions(2)
Typ.
Max
Unit
IDDQ
Quiescent VDD Power Supply Current
VDDQ = Max., Reference Clock = LOW(3)
20
30
mA
Outputsenabled,Alloutputsunloaded
IDDQQ
Quiescent VDDQ Power Supply Current
VDDQ = Max., Reference Clock = LOW(3)
0.1
0.3
mA
Outputsenabled,Alloutputsunloaded
IDDD
Dynamic VDD Power Supply
VDD = Max., VDDQ = Max., CL = 0pF
10
20
μA/MHz
CurrentperOutput
IDDDQ
Dynamic VDDQ Power Supply
VDD = Max., VDDQ = Max., CL = 0pF
20
30
μA/MHz
CurrentperOutput
ITOT
Total Power VDD Supply Current
VDDQ = 1.8V, FREFERENCE CLOCK = 100MHz, CL = 15pF
20
30
mA
VDDQ = 1.8V, FREFERENCE CLOCK = 250MHz, CL = 15pF
25
40
ITOTQ
Total Power VDDQ Supply Current
20
40
mA
VDDQ = 1.8V, FREFERENCE CLOCK = 250MHz, CL = 15pF
40
80
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
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