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參數(shù)資料
| 型號： | IDT5993A |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Scan Test Devices With 18-Bit Universal Bus Transceiver 64-LQFP -40 to 85 |
| 中文描述： | 可編程相偏PLL時鐘驅動器TURBOCLOCK |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 65K |
| 代理商： | IDT5993A |
7
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT5993A
PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
REF DIVIDED BY 2
REF DIVIDED BY 4
t
SKEW1, 3, 4
t
SKEW2
t
SKEW3
t
SKEW3
REF
FB
Q
OTHER Q
t
JR
t
REF
t
PD
t
SKEWPR
t
SKEW0, 1
t
SKEWPR
t
SKEW0, 1
t
ODCV
t
ODCV
t
RPWH
t
RPWL
t
SKEW3, 4
NOTES:
V
CCQ
/PE: The AC Timng Diagramapplies to V
CCQ
/PE=V
CC
. For V
CCQ
/PE=GND, the negative edge of FB aligns with the negative edge of REF, divided outputs change on the
negative edge of REF, and the positive edges of the divide-by-2 and the divide-by-4 signals align.
Skew:
The time between the earliest and the latest output transition among all outputs for which the same t
U
delay has been selected when all are loaded with 50pF (30pF for
-2 and -5) and termnated with 50
to 2.06V.
t
SKEWPR
:
The skew between a pair of outputs (xQ
0
and xQ
1
) when all eight outputs are selected for 0t
U
.
t
SKEW0
:
The skew between outputs when they are selected for 0t
U
.
t
DEV
:
The output-to-output skew between any two devices operating under the same conditions (V
CC
,
ambient temperature, air flow, etc.)
t
ODCV
:
The deviation of the output froma 50% duty cycle. Output pulse width variations are included in t
SKEW2
and t
SKEW4
specifications.
t
PWH
is measured at 2V.
t
PWL
is measured at 0.8V.
t
ORISE
and t
OFALL
are measured between 0.8V and 2V.
t
LOCK
:
The time that is required before synchronization is achieved. This specification is valid only after V
CC
is stable and within normal operating limts. This parameter is measured
fromthe application of a new signal or frequency at REF or FB until t
PD
is within specified limts.
AC TIMING DIAGRAM
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|---|---|
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