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參數(shù)資料
| 型號： | IDT54FCT810BTLB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | FAST CMOS BUFFER/CLOCK DRIVER |
| 中文描述： | FCT SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 5 INVERTED OUTPUT(S), CQCC20 |
| 封裝： | LCC-20 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 107K |
| 代理商： | IDT54FCT810BTLB |
IDT54/74FCT810BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.4
5
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: f
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
Package 1 and Package 2 are same device type and speed grade
3103 drw 10
3103 drw 09
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
SWITCH
CLOSED
SWITCH
OPEN
V
OL
V
OH
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
t
PD1a
PACKAGE 1 OUTPUT
PACKAGE 2 OUTPUT
t
SK2(o)
t
PD2a
3V
1.5V
0V
V
OH
1.5V
V
OL
V
OH
1.5V
V
OL
INPUT
t
PD1b
t
PD2b
t
SK2(o)
t
SK(t)
=
|t
PD2a -
t
PD1a
|
or
|t
PD2b-
t
PD1b
|
PACKAGE SKEW - t
SK
(t)
ENABLE AND DISABLE TIMES
DEFINITIONS:
C
L
=
Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUIT FOR ALL OUTPUTS
ENABLE AND DISABLE TIME
SWITCH POSITION
Test
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
Switch
Closed
Open
3103 lnk 07
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3103 drw 04
3103 drw 07
3103 drw 08
t
PLH
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
t
SK(p)
=
|t
PHL -
t
PLH
|
INPUT
OUTPUT
t
PLH1
OUTPUT 1
OUTPUT 2
t
SK2(o)
t
PHL2
3V
1.5V
0V
V
OH
1.5V
V
OL
V
OH
1.5V
V
OL
INPUT
t
PHL1
t
PLH2
t
SK2(o)
t
SK2(o)
=
|t
PHL2 -
t
PLH1
|
or
|t
PLH2 -
t
PHL1
|
3103 drw 06
3103 drw 05
TEST WAVEFORMS
PACKAGE DELAY
3V
0V
V
OH
t
PLH
t
PHL
V
OL
1.5V
1.5V
t
R
t
F
2.0V
0.8V
t
PLH1
OUTPUT 1
OUTPUT 2
t
SK1(o)
t
PLH2
3V
1.5V
0V
V
OH
1.5V
V
OL
V
OH
1.5V
V
OL
INPUT
t
PHL1
t
PHL2
t
SK1(o)
t
SK1(o)
=
|t
PLH2 -
t
PLH1
|
or
|t
PHL2 -
t
PLH1
|
INPUT
OUTPUT
OUTPUT SKEW (ALL BANKS) - t
SK2
(o)
PULSE SKEW - t
SK
(p)
OUTPUT SKEW (SAME BANK) - t
SK1
(o)
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