參數(shù)資料
型號： IDT54FCT16841BTPF
廠商： Integrated Device Technology, Inc.
英文描述： Ceramic Chip Capacitors / Standard X7R; Capacitance [nom]: 3300pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R; Lead Style: Surface Mount Chip; Lead Dimensions: 1206; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.063"; Container: Bulk; Features: Unmarked
中文描述： 快速CMOS 20位透明鎖存器
文件頁數(shù)： 1/9頁
文件大小： 135K
代理商： IDT54FCT16841BTPF
Integrated Device Technology, Inc.
DESCRIPTION:
The FCT16841AT/BT/CT/ET and FCT162841AT/BT/CT/
ET 20-bit transparent D-type latches are built using advanced
dual metal CMOS technology. These high-speed, low-power
latches are ideal for temporary storage of data. They can be
used for implementing memory address latches, I/O ports,
and bus drivers. The Output Enable and Latch Enable controls
are organized to operate each device as two 10-bit latches or
one 20-bit latch. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for
improved noise margin.
The FCT16841AT/BT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162841AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times–reducing
the need for external series terminating resistors. The
FCT162841AT/BT/CT/ET are plug-in replacements for the
FCT16841AT/BT/CT/ET and ABT16841 for on-board inter-
face applications.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST CMOS 20-BIT
TRANSPARENT
LATCHES
IDT54/74FCT16841AT/BT/CT/ET
IDT54/74FCT162841AT/BT/CT/ET
FUNCTIONAL BLOCK DIAGRAM
2
Q
1
2
OE
2
LE
2
D
1
2556 drw 02
TO 9 OTHER CHANNELS
C
D
1
OE
1
LE
1
Q
1
1
D
1
2556 drw 01
TO 9 OTHER CHANNELS
C
D
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JULY 1996
1996 Integrated Device Technology, Inc.
5.18
DSC-2556/7
1
FEATURES:
Common features:
–
0.5 MICRON CMOS Technology
–
High-speed, low-power CMOS replacement for
ABT functions
–
Typical t
SK
(o) (Output Skew) < 250ps
–
Low input and output leakage
≤
1
μ
A (max.)
–
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
–
Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
–
Extended commercial range of -40
°
C to +85
°
C
–
V
CC
= 5V
±
10%
Features for FCT16841AT/BT/CT/ET:
–
High drive outputs (-32mA I
OH
, 64mA I
OL
)
–
Power off disable outputs permit “l(fā)ive insertion”
–
Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25
°
C
Features for FCT162841AT/BT/CT/ET:
–
Balanced Output Drivers:
±
24mA (commercial),
±
16mA (military)
–
–
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25
°
C
相關(guān)PDF資料
PDF描述
IDT54FCT16841BTPFB FAST CMOS 20-BIT TRANSPARENT LATCHES
IDT54FCT16841BTPV CAP 3300PF 100V 5% X7R SMD-1206 TR-7-PL SN-NIBAR
IDT54FCT16841BTPVB FAST CMOS 20-BIT TRANSPARENT LATCHES
IDT54FCT16841CT FAST CMOS 20-BIT TRANSPARENT LATCHES
IDT54FCT16841CTE FAST CMOS 20-BIT TRANSPARENT LATCHES
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