參數(shù)資料
型號: IDT2309B-1DCG
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封裝: GREEN, SOIC-16
文件頁數(shù): 1/10頁
文件大?。?/td> 219K
代理商: IDT2309B-1DCG
1
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT2309B
3.3VZERODELAYCLOCKBUFFER
OCTOBER 2005
2005 Integrated Device Technology, Inc.
DSC 6996/2
c
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five and one bank of
four outputs
Separate output enable for each output bank
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
IDT2309B-1 for Standard Drive
IDT2309B-1H for High Drive
No external RC network required
Operates at 3.3V VDD
Available in SOIC and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT2309B
ADVANCE
INFORMATION
3.3V ZERO DELAY
CLOCK BUFFER
DESCRIPTION:
The IDT2309B is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT2309B is a 16-pin version of the IDT2305B. The IDT2309B
accepts one reference input, and drives two banks of four low skew clocks.
The -1H version of this device operates at up to 133MHz frequency and
has higher drive than the -1 device. All parts have on-chip PLLs which lock
to an input clock on the REF pin. The PLL feedback is on-chip and is
obtained from the CLKOUT pad. In the absence of an input clock, the
IDT2309B enters power down, and the outputs are tri-stated. In this mode,
the device will draw less than 25μA.
The IDT2309B is characterized for both Industrial and Commercial
operation.
PLL
S1
CLKA1
CLKA2
CLKA3
CLKA4
CLKB1
CLKB2
CLKB3
CLKB4
Control
Logic
1
REF
S2
16
CLKOUT
8
9
2
3
14
15
6
7
10
11
相關PDF資料
PDF描述
IDT2309B-1HDCG 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
IDT2309NZ-1HDCI8 2309 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
IDT2309NZ-1HDCG 2309 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
IDT23S05-1DCGI PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
IDT23S05-1DCGI8 PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
相關代理商/技術參數(shù)
參數(shù)描述
IDT2309B-1DCG8 功能描述:IC CLK BUFFER ZD STD DRV 16-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)
IDT2309B-1DCGBLANK 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER
IDT2309B-1DCGI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER
IDT2309B-1DCI 功能描述:IC CLK BUFFER ZD STD DRV 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)
IDT2309B-1DCI8 功能描述:IC CLK BUFFER ZD STD DRV 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)