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參數(shù)資料
| 型號： | IDT2308A-2HPGI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 3.3V ZERO DELAY CLOCK MULTIPLIER |
| 中文描述： | 3.3零延遲時鐘倍頻 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 79K |
| 代理商： | IDT2308A-2HPGI |
2
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2308A
3.3V ZERO DELAY CLOCK MULTIPLIER
PIN CONFIGURATION
SOIC/ TSSOP
TOP VIEW
REF
CLKA1
S2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
CLKA2
GND
CLKB1
FBK
CLKA4
GND
S1
V
DD
V
DD
CLKB2
CLKB3
CLKB4
CLKA3
Symbol
V
DD
V
I (2)
V
I
Rating
Max.
Unit
V
V
V
Supply Voltage Range
Input Voltage Range (REF)
Input Voltage Range
(except REF)
Input Clamp Current
Continuous Output Current
–0.5 to +4.6
–0.5 to +5.5
–0.5 to
V
DD
+0.5
–50
±50
I
IK
(V
I
< 0)
I
O
(V
O
= 0 to V
DD
)
V
DD
or GND
T
A
= 55°C
(in still air)
(3)
T
STG
Operating
Temperature
Operating
Temperature
mA
mA
Continuous Current
MaximumPower Dissipation
±100
0.7
mA
W
Storage Temperature Range
Commercial Temperature
Range
Industrial Temperature
Range
–65 to +150
0 to +70
°C
°C
-40 to +85
°C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximumpackage power dissipation is calculated using a junction temperature
of 150
°
C and a board trace length of 750 mls.
APPLICATIONS:
SDRAM
Telecom
Datacom
PC Motherboards/Workstations
Critical Path Delay Designs
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Functional Description
Input Reference Clock, 5 Volt Tolerant Input
Clock Output for Bank A
Clock Output for Bank A
3.3V Supply
Ground
Clock Output for Bank B
Clock Output for Bank B
Select Input, Bit 2
Select Input, Bit 1
Clock Output for Bank B
Clock Output for Bank B
Ground
3.3V Supply
Clock Output for Bank A
Clock Output for Bank A
PLL Feedback Input
REF
(1)
CLKA1
(2)
CLKA2
(2)
V
DD
GND
CLKB1
(2)
CLKB2
(2)
S2
(3)
S1
(3)
CLKB3
(2)
CLKB4
(2)
GND
V
DD
CLKA3
(2)
CLKA4
(2)
FBK
NOTES:
1. Weak pull down.
2. Weak pull down on all outputs.
3. Weak pull ups on these inputs.
PIN DESCRIPTION
ABSOLUTE MAX IMUM RATINGS
(1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT2308A-2PG | 3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-2PGG | 3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2309A-1HPGI | 3.3V ZERO DELAY CLOCK BUFFER |
| IDT2309A-1PGGI | 3.3V ZERO DELAY CLOCK BUFFER |
| IDT2309A | 3.3V ZERO DELAY CLOCK BUFFER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT2308A-2PG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-2PGG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-2PGGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-2PGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
| IDT2308A-3 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK MULTIPLIER |
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