參數(shù)資料
型號(hào): IDT2308A-2HPG
廠商: Integrated Device Technology, Inc.
英文描述: 3.3V ZERO DELAY CLOCK MULTIPLIER
中文描述: 3.3零延遲時(shí)鐘倍頻
文件頁(yè)數(shù): 5/10頁(yè)
文件大?。?/td> 79K
代理商: IDT2308A-2HPG
5
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2308A
3.3V ZERO DELAY CLOCK MULTIPLIER
SWITCHING CHARACTERISTICS - COMMERCIAL
Symbol
Parameter
t
1
Output Frequency
t
1
Output Frequency
t
1
Output Frequency
Duty Cycle = t
2
÷
t
1
(-1, -2, -3, -4, -1H, -2H)
Duty Cycle = t
2
÷
t
1
(-1, -2, -3, -4, -1H, -2H)
t
3
Rise Time (-1, -2, -3, -4)
t
3
Rise Time (-1, -2, -3, -4)
t
3
Rise Time (-1H, -2H)
t
4
Fall Time (-1, -2, -3, -4)
t
4
Fall Time (-1, -2, -3, -4)
t
4
Fall Time (-1H)
t
5
Output to Output Skew on same Bank
(-1, -2, -3, -4)
Output to Output Skew (-1H, -2H)
Output Bank A to Output Bank B (-1, -4, -2H)
Conditions
30pF Load, all devices
20pF Load, -1H, -2H Devices
15pF Load, -1, -2, -3, -4 devices
Measured at 1.4V, F
OUT
= 66.66MHz
30pF Load
Measured at 1.4V, F
OUT
= 50MHz
15pF Load
Measured between 0.8V and 2V, 30pF Load
Measured between 0.8V and 2V, 15pF Load
Measured between 0.8V and 2V, 30pF Load
Measured between 0.8V and 2V, 30pF Load
Measured between 0.8V and 2V, 15pF Load
Measured between 0.8V and 2V, 30pF Load
All outputs equally loaded
Min.
10
10
10
40
Typ.
50
Max.
100
133.3
133.3
60
Unit
MHz
MHz
MHz
%
45
50
55
%
2.2
1.5
1.5
2.2
1.5
1.25
200
ns
ns
ns
ns
ns
ns
ps
All outputs equally loaded
All outputs equally loaded
200
200
ps
ps
Output Bank A to Output Bank B Skew (-2, -3)
All outputs equally loaded
400
ps
t
6
t
7
t
8
Delay, REF Rising Edge to FBK Rising Edge
Device to Device Skew
Output Slew Rate
Measured at V
DD
/2
Measured at V
DD
/2 on the FBK pins of devices
Measured between 0.8V and 2V on -1H, -2H
device using Test Circuit 2
Measured at 66.67 MHz, loaded outputs, 15pF Load
Measured at 66.67 MHz, loaded outputs, 30pF Load
Measured at 133.3 MHz, loaded outputs, 15pF Load
Measured at 66.67 MHz, loaded outputs, 30pF Load
Measured at 66.67 MHz, loaded outputs, 15pF Load
Stable Power Supply, valid clocks presented
on REF and FBK pins
1
0
0
±250
700
ps
ps
V/ns
t
J
Cycle to Cycle Jitter
(-1, -1H, -4)
200
200
100
400
400
1
ps
tJ
Cycle to Cycle Jitter
(-2, -2H, -3)
PLL Lock Time
ps
t
LOCK
ms
相關(guān)PDF資料
PDF描述
IDT2308A-2HPGG 3.3V ZERO DELAY CLOCK MULTIPLIER
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