IDT / ICS PCI EXPRESS JITTER ATTENUATOR
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ICS9DB206CLLF
寤犲晢锛� IDT, Integrated Device Technology Inc
鏂囦欢闋佹暩(sh霉)锛� 2/14闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC JITTER ATTENUATOR 28-TSSOP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� PCI-Express
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
绯诲垪锛� HiPerClockS™, PCI Express® (PCIe)
椤炲瀷锛� 婕傜Щ琛版笡鍣�
PLL锛� 鏄�
涓昏鐩殑锛� PCI Express锛圥CIe锛�
杓稿叆锛� HCSL锛孡VDS锛孡VHSTL锛孡VPECL锛孲STL
杓稿嚭锛� HCSL
闆昏矾鏁�(sh霉)锛� 1
姣旂巼 - 杓稿叆:杓稿嚭锛� 1:6
宸垎 - 杓稿叆:杓稿嚭锛� 鏄�/鏄�
闋荤巼 - 鏈€澶э細 140MHz
闆绘簮闆诲锛� 3.135 V ~ 3.465 V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 28-TSSOP锛�0.173"锛�4.40mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 28-TSSOP
鍖呰锛� 绠′欢
鍏跺畠鍚嶇ū锛� 9DB206CLLF
IDT / ICS PCI EXPRESS JITTER ATTENUATOR
10
ICS9DB206CL REV B JULY 14, 2006
ICS9DB206
PCI EXPRESS JITTER ATTENUATOR
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS9DB206 is: 2471
TABLE 6A.
胃
JA
VS
. AIR FLOW TABLE FOR 28 LEAD TSSOP PACKAGE
胃胃胃胃胃
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
82.9掳C/W
68.7掳C/W
60.5掳C/W
Multi-Layer PCB, JEDEC Standard Test Boards
49.8掳C/W
43.9掳C/W
41.2掳C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 6B.
胃
JA
VS
. AIR FLOW TABLE FOR 28 LEAD SSOP PACKAGE
胃胃胃胃胃
JA
by Velocity (Linear Feet per Minute)
0
200
500
Multi-Layer PCB, JEDEC Standard Test Boards
49掳C/W
36掳C/W
30掳C/W
鐩搁棞(gu膩n)PDF璩囨枡
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ICS9DB206CLLFT 鍔熻兘鎻忚堪:IC JITTER ATTENUATOR 28-TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 灏堢敤 绯诲垪:HiPerClockS™, PCI Express® (PCIe) 妯�(bi膩o)婧�(zh菙n)鍖呰:1,500 绯诲垪:- 椤炲瀷:鏅傞悩绶╂矕鍣�/椹�(q奴)鍕曞櫒 PLL:鏄� 涓昏鐩殑:- 杓稿叆:- 杓稿嚭:- 闆昏矾鏁�(sh霉):- 姣旂巼 - 杓稿叆:杓稿嚭:- 宸垎 - 杓稿叆:杓稿嚭:- 闋荤巼 - 鏈€澶�:- 闆绘簮闆诲:3.3V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-SSOP锛�0.209"锛�5.30mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SSOP 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:93786AFT
ICS9DB233AFILF 鍔熻兘鎻忚堪:IC CLK FANOUT/BUFF ZD 20QSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 灏堢敤 绯诲垪:PCI Express® (PCIe) 妯�(bi膩o)婧�(zh菙n)鍖呰:28 绯诲垪:- 椤炲瀷:鏅傞悩/闋荤巼鐧�(f膩)鐢熷櫒 PLL:鏄� 涓昏鐩殑:Intel CPU 鏈嶅嫏(w霉)鍣� 杓稿叆:鏅傞悩 杓稿嚭:LVCMOS 闆昏矾鏁�(sh霉):1 姣旂巼 - 杓稿叆:杓稿嚭:3:22 宸垎 - 杓稿叆:杓稿嚭:鐒�/鏄� 闋荤巼 - 鏈€澶�:400MHz 闆绘簮闆诲:3.135 V ~ 3.465 V 宸ヤ綔婧害:0°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:64-TFSOP 锛�0.240"锛�6.10mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:64-TSSOP 鍖呰:绠′欢
ICS9DB233AFILFT 鍔熻兘鎻忚堪:IC CLK FANOUT/BUFF ZD 20QSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 灏堢敤 绯诲垪:PCI Express® (PCIe) 妯�(bi膩o)婧�(zh菙n)鍖呰:28 绯诲垪:- 椤炲瀷:鏅傞悩/闋荤巼鐧�(f膩)鐢熷櫒 PLL:鏄� 涓昏鐩殑:Intel CPU 鏈嶅嫏(w霉)鍣� 杓稿叆:鏅傞悩 杓稿嚭:LVCMOS 闆昏矾鏁�(sh霉):1 姣旂巼 - 杓稿叆:杓稿嚭:3:22 宸垎 - 杓稿叆:杓稿嚭:鐒�/鏄� 闋荤巼 - 鏈€澶�:400MHz 闆绘簮闆诲:3.135 V ~ 3.465 V 宸ヤ綔婧害:0°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:64-TFSOP 锛�0.240"锛�6.10mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:64-TSSOP 鍖呰:绠′欢
ICS9DB233AFLF 鍔熻兘鎻忚堪:IC CLK FANOUT/BUFF ZD 20QSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 灏堢敤 绯诲垪:PCI Express® (PCIe) 妯�(bi膩o)婧�(zh菙n)鍖呰:28 绯诲垪:- 椤炲瀷:鏅傞悩/闋荤巼鐧�(f膩)鐢熷櫒 PLL:鏄� 涓昏鐩殑:Intel CPU 鏈嶅嫏(w霉)鍣� 杓稿叆:鏅傞悩 杓稿嚭:LVCMOS 闆昏矾鏁�(sh霉):1 姣旂巼 - 杓稿叆:杓稿嚭:3:22 宸垎 - 杓稿叆:杓稿嚭:鐒�/鏄� 闋荤巼 - 鏈€澶�:400MHz 闆绘簮闆诲:3.135 V ~ 3.465 V 宸ヤ綔婧害:0°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:64-TFSOP 锛�0.240"锛�6.10mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:64-TSSOP 鍖呰:绠′欢
ICS9DB233AFLFT 鍔熻兘鎻忚堪:IC CLK FANOUT/BUFF ZD 20QSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏅傞悩/瑷堟檪 - 灏堢敤 绯诲垪:PCI Express® (PCIe) 妯�(bi膩o)婧�(zh菙n)鍖呰:28 绯诲垪:- 椤炲瀷:鏅傞悩/闋荤巼鐧�(f膩)鐢熷櫒 PLL:鏄� 涓昏鐩殑:Intel CPU 鏈嶅嫏(w霉)鍣� 杓稿叆:鏅傞悩 杓稿嚭:LVCMOS 闆昏矾鏁�(sh霉):1 姣旂巼 - 杓稿叆:杓稿嚭:3:22 宸垎 - 杓稿叆:杓稿嚭:鐒�/鏄� 闋荤巼 - 鏈€澶�:400MHz 闆绘簮闆诲:3.135 V ~ 3.465 V 宸ヤ綔婧害:0°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:64-TFSOP 锛�0.240"锛�6.10mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:64-TSSOP 鍖呰:绠′欢
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