參數資料
型號： ICS950812
英文描述： Frequency Generator with 200MHz Differential CPU Clocks
中文描述： 頻率發(fā)生器200MHz的CPU的時鐘差分
文件頁數： 6/29頁
文件大?。?/td> 225K
代理商： ICS950812
6
ICS950812
0542G—08/21/03
Pin #
-
Name
0
1
PWD
0
Bit 7
Spread Enabled
Spread Spectrum Control
Power down mode output level
0= CPU driven in power down
1= undriven
VCH/66.66 Select
Reflects value of pin
Reflects value of pin at power up.
Also can be set.
Frequency Selection
Frequency Selection
Frequency Selection
RW
OFF
ON
Bit 6
-
CPUCLKT(2:0)
RW
HIGH
LOW
0
Bit 5
Bit 4
35
53
3V66_1/VCH_CLK/FS4**
CPU_STOP#*
RW
R
66.66
Stop
48.00
Active
0
X
Bit 3
34
PCI_STOP#*
RW
Stop
Active
X
Bit 2
Bit 1
Bit 0
Note: For PCI_STOP# function, refer to table 3.
39
55
54
FS3
FS1
FS0
RW
R
R
-
-
-
-
-
-
X
X
X
Type
Bit Control
Control Function
Affected Pin
BYTE
0
Pin #
43
Name
MULTSEL*
0
-
1
-
PWD
x
Bit 7
Reflects value of pin
CPU_Stop mode output level
0= CPU driven when stopped
1 = undriven
Allow control of output with
assertion of CPU_STOP#.
Allow control of output with
assertion of CPU_STOP#.
Allow control of output with
assertion of CPU_STOP#.
Output control
Output control
Output control
R
Bit 6
-
CPUCLKT(2:0)
RW
HIGH
LOW
0
Bit 5
45, 44
CPUCLKT2, CPUCLKC2
(see note)
CPUCLKT1, CPUCLKC1
(see note)
CPUCLKT0, CPUCLKC0
(see note)
CPUCLKT2, CPUCLKC2
CPUCLKT1, CPUCLKC1
CPUCLKT0, CPUCLKC0
CPUCLK(2:0) can be turned on/off by CPU_STOP#. Refer to table 4.
RW
Not
Freerun
Not
Freerun
Not
Freerun
Disable
Disable
Disable
Freerun
0
Bit 4
49, 48
RW
Freerun
0
Bit 3
52, 51
RW
Freerun
0
Bit 2
Bit 1
Bit 0
Note:
45, 44
49, 48
52, 51
RW
RW
RW
Enable
Enable
Enable
1
1
1
Type
Bit Control
Control Function
Affected Pin
BYTE
1
Pin #
56
18
17
16
13
12
11
10
PCICLK(6:0) can be turned on/off by PCI_STOP#. Refer to table 3.
Name
REF
PCICLK6
PCICLK5
PCICLK4
0
1
PWD
0
1
1
1
1
1
1
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Note:
1X or 2X Strength control
Output control
Output control
Output control
Output control
Output control
Output control
Output control
RW
RW
RW
RW
RW
RW
RW
RW
1X
2X
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
**E_PCICLK3/PCICLK3
PCICLK2
**E_PCICLK1/PCICLK1
PCICLK0
BYTE
2
Control Function
Bit Control
Affected Pin
Type
Pin #
38
39
Name
0
1
PWD
1
1
Bit 7
Bit 6
48MHz_DOT
48MHz_USB/FS3**
Output control
Output control
Allow control of output with
assertion of PCI_STOP#.
Allow control of output with
assertion of PCI_STOP#.
Allow control of output with
assertion of PCI_STOP#.
Output control
Output control
Output control
RW
RW
Disable
Disable
Enable
Enable
Not
Freerun
Not
Freerun
Not
Freerun
Enable
Enable
Enable
Bit 5
7
PCICLK_F2 (see note)
RW
Freerun
0
Bit 4
6
PCICLK_F1 (see note)
RW
Freerun
0
Bit 3
5
PCICLK_F0 (see note)
RW
Freerun
0
Bit 2
Bit 1
Bit 0
Note: PCICLK_F(2:0) can be turned on/off by PCI_STOP#. Refer to table 5.
7
6
5
PCICLK_F2
PCICLK_F1
PCICLK_F0
RW
RW
RW
Disable
Disable
Disable
1
1
1
BYTE
3
Control Function
Affected Pin
Bit Control
Type
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參數描述
ICS950812CGLF 功能描述:IC FREQ GEN 200MHZ CLK 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
ICS950812CGLFT 功能描述:IC FREQ GEN 200MHZ CLK 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務器 輸入:時鐘 輸出:LVCMOS 電路數:1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應商設備封裝:64-TSSOP 包裝:管件
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