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參數(shù)資料
| 型號(hào)： | ICS950405 |
| 英文描述： | AMD - K8 System Clock Chip |
| 中文描述： | AMD公司-的K8系統(tǒng)時(shí)鐘芯片 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 134K |
| 代理商： | ICS950405 |
2
ICS950405
0802F—04/22/05
Pin Descriptions
PIN # PIN NAME
PIN
TYPE
I/O
PWR
IN
OUT
PWR
I/O
I/O
OUT
PWR
PWR
I/O
OUT
OUT
OUT
PWR
PWR
OUT
OUT
PWR
PWR
DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
*FS0/REF0
VDDHTT
X1
X2
GND
*ModeA/HTTCLK0
*ModeB/PCICLK8/HTTCLK1
PCICLK9/HTTCLK2
VDDPCI
GND
PCICLK11/HTTCLK3
PCICLK10
PCICLK0
PCICLK1
GND
VDDPCI
PCICLK2
PCICLK3
VDDPCI
GND
Frequency select latch input pin / 14.318 MHz reference clock.
Supply for HTT clocks, nominal 3.3V.
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Mode selection latch input pin / Hyper Transport output.
Mode selection latch input pin / PCI clock output / Hyper Transport output.
PCI clock output / Hyper Transport output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output / Hyper Transport output.
PCI clock output.
PCI clock output.
PCI clock output.
Ground pin.
Power supply for PCI clocks, nominal 3.3V
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output. This output is default @ 2X drive and can be programmed to lower drive
via IIC.
PCI clock output. This output is default @ 2X drive and can be programmed to lower drive
via IIC.
PCI clock output. This output is default @ 2X drive and can be programmed to lower drive
via IIC.
PCI clock output. This output is default @ 2X drive and can be programmed to lower drive
via IIC.
Clock pin of I2C circuitry 5V tolerant
Data pin for I2C circuitry 5V tolerant
Ground pin.
21
2XPCICLK4
OUT
22
2XPCICLK5
OUT
23
2XPCICLK6
OUT
24
2XPCICLK7
OUT
25
26
27
SCLK
SDATA
GND
IN
I/O
PWR
28
24_48MHz/Sel24_48#*
I/O
24/48MHz clock output / Latched select input for 24/48MHz output. 0=48MHz, 1 = 24MHz.
29
30
31
AVDD48
GND
48MHz/FS3**
PWR
PWR
I/O
Power for 24/48MHz outputs and fixed PLL core, nominal 3.3V
Ground pin.
Fixed 48MHz clock output. 3.3V / 'Frequency select latch input pin
Asynchronous active low input pin used to power down the device into a low power state.
The internal clocks are disabled and the VCO and the crystal are stopped.
Ground pin.
Ground pin.
Supply for CPU clocks, 3.3V nominal
Complimentary clock of differential 3.3V push-pull K8 pair.
True clock of differential 3.3V push-pull K8 pair.
Supply for CPU clocks, 3.3V nominal
Ground pin.
Complimentary clock of differential 3.3V push-pull K8 pair.
True clock of differential 3.3V push-pull K8 pair.
Ground pin.
3.3V power for the PLL core.
Real time system reset signal for frequency gear ratio change or watchdog timer timeout.
This signal is active low.
14.318 MHz reference clock / Frequency select latch input pin.
Ref, XTAL power supply, nominal 3.3V
Ground pin.
14.318 MHz reference clock / Frequency select latch input pin.
32
PD#*
IN
33
34
35
36
37
38
39
40
41
42
43
GND
GND
VDDCPU
CPUCLK8C1
CPUCLK8T1
VDDCPU
GND
CPUCLK8C0
CPUCLK8T0
GND
VDDA
PWR
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
PWR
44
Reset#
OUT
45
46
47
48
REF2/FS2*
VDDREF
GND
REF1/FS1*
I/O
PWR
PWR
I/O
* Internal Pull-Up Resistor ** Internal Pull-Down Resistor ~ 1.5X Drive Strength
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS950405AFLF | 功能描述:IC SYSTEM CLK CHIP AMD-K8 48SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950405AFLFT | 功能描述:IC SYSTEM CLK CHIP AMD-K8 48SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950410 | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K System Clock Chip |
| ICS950410AFLF | 功能描述:IC SYSTEM CLK CHIP AMD-K8 48SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950410AFLFT | 功能描述:IC SYSTEM CLK CHIP AMD-K8 48SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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