參數(shù)資料
型號: ICS950402YGLF-T
英文描述: AMD - K8 System Clock Chip
中文描述: AMD公司-的K8系統(tǒng)時鐘芯片
文件頁數(shù): 11/19頁
文件大?。?/td> 150K
代理商: ICS950402YGLF-T
11
ICS950402
0700B—04/30/04
I
2
C Table: Group Skew Control Register
Control
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PCISkw3
PCISkw2
PCISkw1
PCISkw0
PCI/HTTSkw3
PCI/HTTSkw2
PCI/HTTSkw1
PCI/HTTSkw0
RW
RW
RW
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
0
See Table 3: 7-Steps Skew
Programming Table
CPU-PCI(6:0) Skew
Control
CPU-PCI(10:7) /
HTT(2:0) Skew Control
See Table 3: 7-Steps Skew
Programming Table
-
-
-
-
PWD
-
-
-
-
Type
Byte 19
Pin #
Name
0
1
Table 3: 7-Steps Skew Programming Table
7 Step
11
11
900 ps
10
N/A
01
N/A
00
N/A
MSB
10
01
00
LSB
750 ps
N/A
N/A
N/A
600 ps
N/A
N/A
N/A
450 ps
300 ps
150 ps
0.0 ps
I
2
C Table: Group Skew Control Register
Control
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RW
RW
RW
RW
RW
RW
RW
RW
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
1
1
1
1
1
1
1
I
2
C Table: Slew Rate Control Register
Pin #
Name
Control
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Type
0
1
PWD
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Reserved
Reserved
Reserved
Reserved
Reserved
RW
RW
RW
RW
RW
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
Bit 2
GSR_EN
Gearshift Reset Enable
RW
Disable
Enable
0
Bit 1
ASEL
Async Frequency Select
RW
0
Bit 0
AEN
Async Frequency Enable
RW
1
See Table 4 for Async Freq
-
-
-
-
-
Byte 21
-
-
-
-
-
0
1
-
-
-
-
-
PWD
-
Byte 20
Pin #
Name
Type
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