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參數(shù)資料
| 型號： | ICS950402YFLF-T |
| 英文描述： | AMD - K8 System Clock Chip |
| 中文描述： | AMD公司-的K8系統(tǒng)時鐘芯片 |
| 文件頁數(shù)： | 2/19頁 |
| 文件大小： | 150K |
| 代理商： | ICS950402YFLF-T |
2
ICS950402
0700B—04/30/04
Pin Descriptions
PIN #
PIN NAME
PIN
TYPE
I/O
PWR
IN
OUT
PWR
DESCRIPTION
1
2
3
4
5
*FS0/REF0
VDDREF
X1
X2
GND
Frequency select latch input pin / 14.318 MHz reference clock.
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
PCI clock output / Hyper Transport output / Mode selection pin, this input is activated by the
ModeB selection pin.
PCI clock output / Hyper Transport output / Mode selection latch input pin.
PCI clock output / Hyper Transport output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output / Hyper Transport output.
PCI clock output.
PCI clock output.
PCI clock output.
Ground pin.
Power supply for PCI clocks, nominal 3.3V
Real time system reset signal for watchdog timer timeout. This signal is active low and
selected by Mode latch input / 3.3V PCI clock clock output.
Stops all PCICLKs besides the PCICLK_F clocks at logic 0 level, when input low / PCI clock
output, this output is activated by the Mode selection pin
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
Free running PCI clock not affected by PCI_STOP# / Mode selection latch input pin.
PCI clock output, this output is activated by the Mode selection pin / Stops all PCICLKs
besides the PCICLK_F clocks at logic 0 level, when input low.
Clock pin of I2C circuitry 5V tolerant
Data pin for I2C circuitry 5V tolerant
Ground pin.
6
*(PCICLK7/HTTCLK0)ModeA
I/O
7
8
9
*PCICLK8/HTTCLK1/ModeB
PCICLK9/HTTCLK2
VDDPCI
GND
~PCICLK10/HTTCLK3
PCICLK11
PCICLK0
PCICLK1
GND
VDDPCI
I/O
OUT
PWR
PWR
OUT
OUT
OUT
OUT
PWR
PWR
10
11
12
13
14
15
16
17
****PCICLK2
OUT
18
****PCICLK3
VDDPCI
GND
PCICLK4
PCICLK5
~*PCICLK_F/ModeC
I/O
19
20
21
22
23
PWR
PWR
OUT
OUT
I/O
24
~*(PCICLK6)PCI_STOP#
I/O
25
26
27
SCLK
SDATA
GND
IN
I/O
PWR
28
24_48MHz/Sel24_48#*~
I/O
24/48MHz clock output / Latched select input for 24/48MHz output. 0=48MHz, 1 = 24MHz.
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
AVDD48
GND
48MHz/FS3**
VDD
GND
GND
VDDCPU
CPUCLK8C1
CPUCLK8T1
VDDCPU
GND
CPUCLK8C0
CPUCLK8T0
GND
VDDA
PWR
PWR
I/O
PWR
PWR
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
PWR
Power for 24/48MHz outputs and fixed PLL core, nominal 3.3V
Ground pin.
Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
Power supply, nominal 3.3V
Ground pin.
Ground pin.
Supply for CPU clocks, 3.3V nominal
"Complimentary" clocks of differential 3.3V push-pull K8 pair.
"True" clocks of differential 3.3V push-pull K8 pair.
Supply for CPU clocks, 3.3V nominal
Ground pin.
"Complimentary" clocks of differential 3.3V push-pull K8 pair.
"True" clocks of differential 3.3V push-pull K8 pair.
Ground pin.
3.3V power for the PLL core.
Real time system reset signal for frequency gear ratio change or watchdog timer timeout.
This signal is active low.
14.318 MHz reference clock / Frequency select latch input pin.
Ref, XTAL power supply, nominal 3.3V
Ground pin.
14.318 MHz reference clock / Frequency select latch input pin.
44
Reset#
OUT
45
46
47
48
REF2/FS2*
VDDREF
GND
REF1/FS1*
I/O
PWR
PWR
I/O
* Internal Pull-Up Resistor ** Internal Pull-Down Resistor ~ This Output has 2X Drive Strength
**** This Output has 2.3X Drive Strength
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS950402YGLF-T | AMD - K8 System Clock Chip |
| ICS950403 | AMD - K8⑩ System Clock Chip |
| ICS950403 | AMD - K8⑩ System Clock Chip |
| ICS950405 | AMD - K8 System Clock Chip |
| ICS950410 | AMD - K System Clock Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS950402YGLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K8 System Clock Chip |
| ICS950403 | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K8? System Clock Chip |
| ICS950405 | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K8 System Clock Chip |
| ICS950405AFLF | 功能描述:IC SYSTEM CLK CHIP AMD-K8 48SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950405AFLFT | 功能描述:IC SYSTEM CLK CHIP AMD-K8 48SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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