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參數(shù)資料
| 型號： | ICS9219YGLF-T |
| 英文描述： | Direct Rambus Clock Generator Lite |
| 中文描述： | 直接Rambus的時鐘發(fā)生器建興 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 80K |
| 代理商： | ICS9219YGLF-T |
2
ICS9219
0931B—10/25/04
Pin Descriptions
PIN #
PIN NAME
1
2
3
4
5
6
7
8
PIN TYPE
PWR/IN
PWR
OUT
IN
PWR
OUT
PWR
IN
DESCRIPTION
VDDT
GND
X2
X1
VDD
REF
GND
FS1*
Power supply, nominal 3.3V/Test mode
Ground pin.
Crystal output (14MHz to 25MHz)
Crystal input (14MHz to 25MHz)
Power supply, nominal 3.3V
Reference of Input
Ground pin.
Frequency select pin.
Real-time frequency select pin with internal 120Kohm pull-up resistor (check
SMBus HW/SW setting for priority).
Power supply, nominal 3.3V
Ground pin.
Output clock connected to the Rambus channel. This output is the complement
of BUSCLK.
Output clock connected to the Rambus channel. This output is the true
component of BUSCLK.
Ground pin.
Power supply, nominal 3.3V
Frequency select pin.
9
FS2*
IN
10
11
VDD
GND
PWR
PWR
12
BUSCLKC
OUT
13
BUSCLKT
OUT
14
15
16
GND
VDD
FS0*
PWR
PWR
IN
* Pins have 60K internal pull-up to VDD
Table 2: Function Table
FS(2:0)
F
0
1
1
0
1
0
0
1
1
0
F
0
1
1
0
0
1
0
1
0
1
F
0
1
0
1
X
X
X
X
X
X
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
0
0
0
0
16
NORMAL
NORMAL
NORMAL
NORMAL
TEST
TEST
TEST
TEST
TEST
TEST
INPUT x MULT
INPUT x MULT
INPUT x MULT
INPUT x MULT
BUSCLKT/2
BUSCLKT/4
X1
X1
X1/2
X1/4
BUSCLKC
BUSCLKC
BUSCLKC
BUSCLKC
BUSCLKC/2
BUSCLKC/4
X1(INVERT)
X1(INVERT)
X1(INVERT)/2
X1(INVERT)/4
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
21.33
16
21.33
-
-
-
-
-
-
BUSCLKC
REF
VDDT
INPUT
MULT
MODE
BUSCLKT
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