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參數(shù)資料
| 型號(hào)： | ICS9150-08 |
| 英文描述： | Frequency Generator & Integrated Buffers for Pentium/Pro⑩ |
| 中文描述： | 頻率發(fā)生器 |
| 文件頁(yè)數(shù)： | 9/14頁(yè) |
| 文件大?。?/td> | 329K |
| 代理商： | ICS9150-08 |
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9
ICS9150-01
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the
ICS9150-01
. It is used to turn off the PCICLK (0:5) clocks for low power
operation. PCI_STOP# is synchronized by the
ICS9150-01
internally. The minimum that the PCICLK (0:5) clocks are enabled
(PCI_STOP# high pulse) is at least 10 PCICLK (0:5) clocks. PCICLK (0:5) clocks are stopped in a low state and started with
a full high pulse width guaranteed. PCICLK (0:5) clock on latency cycles are only one rising PCICLK clock off latency is one
PCICLK clock.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9150 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
inside the ICS9150.
3. All other clocks continue to run undisturbed.
4. CPU_STOP# is shown in a high (true) state.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ICS9150F-01 | 制造商:ICS 功能描述: |
| ICS9150F02 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Peripheral IC |
| ICS9150F-02 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:Pentium Pro™ and SDRAM Frequency Generator |
| ICS9150F-04 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:Pentium Pro⑩ and SDRAM Frequency Generator |
| ICS9150F04T | 制造商:ICS 功能描述:New |
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