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參數(shù)資料
| 型號： | ICS9112M-18 |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 91 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大小： | 52K |
| 代理商： | ICS9112M-18 |
ICS9112-18
Zero Delay, Low Skew Buffer
ADVANCE INFORMATION
MDS9112-18B
1
Revision 12038
Printed 12/11/98
Integrated Circuit Systems 525 Race Street San Jose CA 95126 (408)295-9800tel(408)295-9818fax
Block Diagram
Description
Features
The ICS9112-18 is a low jitter, low-skew, high
performance PLL based zero delay buffer for high
speed applications. Based on ICS’s proprietary low
jitter Phase Locked Loop (PLL) techniques, the
device provides eight low skew outputs at speeds
up to 135 MHz at 3.3V. The ICS9112-18 includes
a bank of four outputs running at 1X, and another
four outputs running at 1/2X. In the zero delay
mode, the rising edge of the input clock is aligned
with the rising edges of all eight outputs.
Compared to competitive CMOS devices, the
ICS9112-18 has the lowest jitter of all.
ICS manufactures the largest variety of clock
generators and buffers, and is the largest clock
supplier in the world.
Packaged in 16 pin narrow SOIC
Zero input-output delay
Four 1X outputs plus four half-X outputs
Output to output skew is less than 250 ps
Output clocks up to 135 MHz at 3.3V
Ability to generate 2X the input
Full CMOS outputs with 25 mA output drive
capability at TTL levels
Advanced, low power, sub-micron CMOS process
3.0 to 5.5 V operating voltage
PLL
CLKA1
FBIN
Mux
CLKA2
S2, S1
2
÷ 2
CLKA3
CLKA4
CLKB1
CLKB2
CLKB3
CLKB4
Control
Logic
CLKIN
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS9112M-22 | 功能描述:IC CLK BUFFER DVR 133MHZ 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅(qū)動器 系列:- 標(biāo)準(zhǔn)包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件 |
| ICS9112M-31 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator for Fibre Channel Systems |
| ICS9112M-32 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator for Fibre Channel Systems |
| ICS9112M-33 | 功能描述:IC CLOCK DRIVER LO JITTER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS9112M-33T | 功能描述:IC CLOCK DRIVER LO JITTER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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