DUAL LVCMOS / LVTTL-
參數(shù)資料
型號: ICS85322AMLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 11/13頁
文件大?。?/td> 0K
描述: IC TRANSLATOR LVPECL 8-SOIC
標(biāo)準(zhǔn)包裝: 2,500
邏輯功能: 變換器
位數(shù): 2
輸入類型: LVCMOS,LVTTL
輸出類型: LVPECL
通道數(shù): 2
輸出/通道數(shù)目: 2
差分 - 輸入:輸出: 無/是
傳輸延遲(最大): 1.9ns
電源電壓: 2.375 V ~ 2.625 V,3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
其它名稱: 85322AMLFT
85322AM
www.idt.com
REV. D JULY 31, 2010
7
ICS85322
DUAL LVCMOS / LVTTL-TO-DIFFERENTIAL
2.5V / 3.3V LVPECL TRANSLATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85322.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85322 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX = VCC_MAX * IEE_MAX = 3.465V * 25mA = 86.6mW
Power (outputs)
MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power
_MAX (3.465V, with all outputs switching) = 86.6mW + 60mW = 146.6mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for the devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 5 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.147W * 103.3°C/W = 85.2°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
θθθθθ
JA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
128.5°C/W
115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
112.7°C/W
103.3°C/W
97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 5. THERMAL RESISTANCE
θθθθθ
JA
FOR
8-PIN SOIC, FORCED CONVECTION
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