LOW S
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ICS85314BMI-01LF
寤犲晢锛� IDT, Integrated Device Technology Inc
鏂囦欢闋佹暩(sh霉)锛� 2/20闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC CLOCK BUFFER MUX 2:5 20-SOIC
妯欐簴鍖呰锛� 37
绯诲垪锛� HiPerClockS™
椤炲瀷锛� 鎵囧嚭绶╂矕鍣紙鍒嗛厤锛夛紝澶氳矾寰�(f霉)鐢ㄥ櫒
闆昏矾鏁�(sh霉)锛� 1
姣旂巼 - 杓稿叆:杓稿嚭锛� 2:5
宸垎 - 杓稿叆:杓稿嚭锛� 鏄�/鏄�
杓稿叆锛� HCSL锛孡VCMOS锛孡VDS锛孡VHSTL锛孡VPECL锛孡VTTL锛孲STL
杓稿嚭锛� LVPECL
闋荤巼 - 鏈€澶э細 700MHz
闆绘簮闆诲锛� 2.375 V ~ 3.8 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 20-SOIC锛�0.295"锛�7.50mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 20-SOIC
鍖呰锛� 绠′欢
鍏跺畠鍚嶇ū锛� 85314BMI-01LF
85314BGI-01
www.idt.com
REV. F JULY 25, 2010
10
ICS85314I-01
LOW SKEW, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
FIGURE 3C. CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
FIGURE 3B. CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER
FIGURE 3D. CLK/NCLK INPUT DRIVEN BY
3.3V LVDS DRIVER
3.3V
R1
50
R3
50
Zo = 50 Ohm
LVPECL
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
3.3V
Input
R2
50
Zo = 50 Ohm
Input
HiPerClockS
CLK
nCLK
3.3V
R3
125
R2
84
Zo = 50 Ohm
3.3V
R4
125
LVPECL
R1
84
3.3V
DIFFERENTIAL CLOCK INPUT INTERFACE
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
SWING and VOH must meet the
V
PP and VCMR input requirements. Figures 3A to 3E show
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here
FIGURE 3A. CLK/NCLK INPUT DRIVEN BY
LVHSTL DRIVER
are examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in
Figure 3A, the input termination applies for LVHSTL
drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
1.8V
R2
50
Input
LVHSTL Driver
ICS
HiPerClockS
R1
50
LVHSTL
3.3V
Zo = 50 Ohm
HiPerClockS
CLK
nCLK
FIGURE 3E. CLK/NCLK INPUT DRIVEN BY
3.3V LVPECL DRIVER WITH AC COUPLE
Zo = 50 Ohm
R3
125
HiPerClockS
CLK
nCLK
3.3V
R5
100 - 200
3.3V
R2
84
3.3V
R6
100 - 200
Input
R5,R6 locate near the driver pin.
Zo = 50 Ohm
R1
84
R4
125
C2
LVPECL
C1
Zo = 50 Ohm
R1
100
3.3V
LVDS_Driv er
Zo = 50 Ohm
Receiv er
CLK
nCLK
3.3V
鐩搁棞(gu膩n)PDF璩囨枡
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