參數(shù)資料
型號: ICS85104AGILFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 4/17頁
文件大?。?/td> 0K
描述: IC CLOCK BUFFER MUX 2:4 20-TSSOP
產(chǎn)品培訓(xùn)模塊: PCI-Express
標(biāo)準(zhǔn)包裝: 2,500
系列: HiPerClockS™
類型: 扇出緩沖器(分配),多路復(fù)用器
電路數(shù): 1
比率 - 輸入:輸出: 2:4
差分 - 輸入:輸出: 是/是
輸入: HCSL,LVCMOS,LVDS,LVHSTL,LVPECL,LVTTL,SSTL
輸出: HCSL
頻率 - 最大: 500MHz
電源電壓: 2.97 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
其它名稱: 85104AGILFT
ICS85104AGI REVISION A MAY 27, 2011
12
2011 Integrated Device Technology, Inc.
ICS85104I Data Sheet
LOW SKEW, 1-TO-4, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85104I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85104I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 10% = 3.63V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 3.63V * 27mA = 98.01mW
Power (outputs)
MAX
= 47.3mW/Loaded Output pair
If all outputs are loaded, the total power is 4 * 47.3mW = 189.2mW
Total Power
_MAX
(3.63V, with all outputs switching) = 98.01mW + 189.2mW = 287.21mW
2. Junction Temperature.
Junction temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The maximum
recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the
bond wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in Section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 91.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.287W * 91.1°C/W = 111.1°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (multi-layer).
TABLE 6. THERMAL RESISTANCE
θθθθθ
JA
FOR
20-LEADN TSSOP, FORCED CONVECTION
θθθθθ
JA
by Velocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
91.1°C/W
86.7°C/W
84.6°C/W
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