IDT / ICS 3.3V LVPECL FREQUENCY SYNTHESIZ" />
參數(shù)資料
型號: ICS843256CK-24LF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 3/16頁
文件大?。?/td> 0K
描述: IC SYNNTHESIZE 6LVPECL 32-VFQFPN
標準包裝: 490
系列: HiPerClockS™, FemtoClock™
類型: 頻率合成器
PLL: 帶旁路
輸入: LVCMOS,LVTTL,晶體
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:6
差分 - 輸入:輸出: 無/是
頻率 - 最大: 390.625MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設(shè)備封裝: 32-VFQFPN 裸露焊盤(4x4)
包裝: 托盤
其它名稱: 843256CK-24LF
IDT / ICS 3.3V LVPECL FREQUENCY SYNTHESIZER
11
ICS843256BG REV. A MAY 23, 2007
ICS843256
FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843256.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843256 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 190mA = 658.35mW
Power (outputs)
MAX
= 30mW/Loaded Output pair
If all outputs are loaded, the total power is 6 * 30mW = 180mW
Total Power
_MAX
(3.465V, with all outputs switching) = 658;.35mW + 180mW = 838.35mW
2.
Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 37°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.838W * 37°C/W = 101°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 7B. THERMAL RESISTANCE
θθθθθ
JA
FOR
24-PIN TSSOP, E-PAD FORCED CONVECTION
θθθθθ
JA
by Velocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
37°C/W
31°C/W
30°C/W
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